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(unknown []) by gzga-smtp-mtada-g1-1 (Coremail) with SMTP id _____wD3b1rIOV5qyHOjKQ--.35310S9; Mon, 20 Jul 2026 23:08:01 +0800 (CST) From: Hans Zhang <18255117159@163.com> To: bhelgaas@google.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, jingoohan1@gmail.com Cc: imx@lists.linux.dev, linuxppc-dev@lists.ozlabs.org, linux-amlogic@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-arm-msm@vger.kernel.org, sophgo@lists.linux.dev, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev, linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com> Subject: [PATCH v3 15/16] PCI: dwc: tegra194: Use cached PCIe capability offset Date: Mon, 20 Jul 2026 23:06:18 +0800 Message-Id: <20260720150619.24733-16-18255117159@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260720150619.24733-1-18255117159@163.com> References: <20260720150619.24733-1-18255117159@163.com> MIME-Version: 1.0 X-CM-TRANSID: _____wD3b1rIOV5qyHOjKQ--.35310S9 X-Coremail-Antispam: 1Uf129KBjvJXoW7trWfJrW7KFWkXFWkKFy3urg_yoW8KF18pa yfXrWFkr1UJr4SqFsrAan8ZF1F93sIyrW7GanagwsIvr17C347WwsYk3y5tF17CFZFyryU Cr18tFy7Gr15J37anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0pi9a9hUUUUU= X-Originating-IP: [240e:b8f:91b3:d000:f138:f837:e143:4264] X-CM-SenderInfo: rpryjkyvrrlimvzbiqqrwthudrp/xtbCwxG0WGpeOdEBugAA3Z X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260720_080816_516207_1BCC50A0 X-CRM114-Status: GOOD ( 10.89 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org In host mode: tegra_pcie_dw_host_init() runs inside .start_link, which is called after dw_pcie_host_init() has cached the offset. However, the driver's own initialization already enables hardware, so calling dw_pcie_get_pcie_cap() is safe and will return the cached value. In endpoint mode: pex_ep_event_pex_rst_deassert() runs after hardware is enabled (PERST# deassert). Because the core no longer caches automatically, we call dw_pcie_get_pcie_cap() here to cache the offset for subsequent accesses. The helper performs the DBI read only when hardware is ready. Thus, the private pcie_cap_base is always valid and can still be used for register accesses. Signed-off-by: Hans Zhang <18255117159@163.com> --- In pcie-tegra194, dw_pcie_find_capability() appears in: static const struct dw_pcie_ops tegra_dw_pcie_ops = { .start_link = tegra_pcie_dw_start_link, }; tegra_pcie_dw_start_link() -> tegra_pcie_dw_host_init() -> dw_pcie_find_capability() tegra_pcie_dw_probe() case DW_PCIE_EP_TYPE: tegra_pcie_config_ep() -> pex_ep_event_pex_rst_deassert() -> dw_pcie_find_capability() --- drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 795cef5a915d..bf482bc66a92 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -905,8 +905,7 @@ static int tegra_pcie_dw_host_init(struct dw_pcie_rp *pp) pp->bridge->ops = &tegra_pci_ops; if (!pcie->pcie_cap_base) - pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci, - PCI_CAP_ID_EXP); + pcie->pcie_cap_base = dw_pcie_get_pcie_cap(pci); val = dw_pcie_readl_dbi(pci, PCI_IO_BASE); val &= ~(IO_BASE_IO_DECODE | IO_BASE_IO_DECODE_BIT8); @@ -1889,8 +1888,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) dw_pcie_writel_dbi(pci, GEN3_RELATED_OFF, val); } - pcie->pcie_cap_base = dw_pcie_find_capability(&pcie->pci, - PCI_CAP_ID_EXP); + pcie->pcie_cap_base = dw_pcie_get_pcie_cap(pci); /* Clear Slot Clock Configuration bit if SRNS configuration */ if (pcie->enable_srns) { -- 2.34.1 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic