From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D67DBC98332 for ; Sun, 27 Sep 2026 14:29:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Reply-To:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References: Message-Id:MIME-Version:Subject:Date:From:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5uMXAiu6blM0i+dbQyM6OQMktDYZE8kR9+gDmgQgeTQ=; b=pqPjxN67xw0qlB Noi2b22SZ2Dwvy39xO3QAUahzqzdrD3pupOEyv2pLT/OtI9y2phjeJWZB0COScgh6Wi7ViqePOUc4 JpvQMkqOYhyvR/QmcdB4fFQXoii+TwU/HIuNPpLAacDIe9TfRizqEMAg/A7NUzAs1JLVkl3HpfxAr COmFLV9hF82gtsTgzenGU4I4L43Gx4a8OEWlSxFOa9gA2RJQ5MXecQkwL72tom5ueLg9QBim215PG YyqPl6LuldncO8bXTtiJ3ojVHhIduPNpfHX8OXXs6DqyfCOLgn5zE6TnoW8LVafUfD6Wno8VIEst1 +s4nskSVrF8T4veZxACA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xApsQ-0000000GRRm-41ob; Sun, 27 Sep 2026 14:29:14 +0000 Received: from sea.source.kernel.org ([172.234.252.31]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xApsP-0000000GRQy-2Csx; Sun, 27 Sep 2026 14:29:13 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id E35C64477C; Sun, 27 Sep 2026 14:29:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id BDB1FC4AF16; Sun, 27 Sep 2026 14:29:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1790519352; bh=C204W/yB+PghlPEk0hny36BOqfLvlmVXE04baWTGylE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=VHFXhe0pIkf44+OLRN2RfOr/mC7yAOH4TPymHU9o2Nd+1gTq75cl/C/F6qC/HJ93a vZfh9m1d5EnG4Ji7Z8wrClscZGDEdjVASjAskQLkSVZ5dp/VguZMIQJJSaO7Ei44qC tuH8QJDhva5NSvTj82lB2Tvj/MhbWX59z/mzrXLMUjWHbWUq5TiiJMpgXVzGJ4Hb2Z 3KeECwi2TPrCHRY0w7OWiNT0AdSrqVvUA38fkfg3B/jo46WIBBnJ9XpMv9uIhJFWDn XQKTLoCVFQfvtDu30TY579GNCJ8AWPwuQ2hHAn5pTuhAPBviLkTr7dsrAuSYj09fEL bIJndrtRxXaWA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5780C9832F; Sun, 27 Sep 2026 14:29:12 +0000 (UTC) From: Ronald Claveau via B4 Relay Date: Sun, 27 Sep 2026 16:28:16 +0200 Subject: [PATCH v3 2/3] pwm: meson: Add optional core clock for S4 PWM MIME-Version: 1.0 Message-Id: <20260927-add-t7-sys-pwm-clk-v3-2-18d66abea4d1@aliel.fr> References: <20260927-add-t7-sys-pwm-clk-v3-0-18d66abea4d1@aliel.fr> In-Reply-To: <20260927-add-t7-sys-pwm-clk-v3-0-18d66abea4d1@aliel.fr> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiner Kallweit , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Ronald Claveau X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1224; i=linux-kernel-dev@aliel.fr; h=from:subject:message-id; bh=38T10zBYHuRS2HPS8ZW7iUWdDAPvTmkAaZ2SgSI77jU=; b=owGbwMvMwCWm1SvKXP3cUInxtFoSQ9ZODa3lGz+sF/pdpSvCfHdB+5qmNToMZSlScyu3LbXbE hK1hflTRykLgxgXg6yYIkv/XMsT7y4fPfN1j3oKzBxWJpAhDFycAjARmxBGhpcaOmHzJELMLu+U 509/bCIwdeHJyrLTfE8i016tPvL+53VGhj2lfXL/1C+0hyTv/nUoX0uYycVwc6G2Cvvx3zs3Xe8 5xwoA X-Developer-Key: i=linux-kernel-dev@aliel.fr; a=openpgp; fpr=DFD863F61375BF917F0012173953305EF1D0EC3E X-Endpoint-Received: by B4 Relay for linux-kernel-dev@aliel.fr/default with auth_id=744 X-Original-From: Ronald Claveau X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: linux-kernel-dev@aliel.fr Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org From: Ronald Claveau On some SoCs (e.g. T7), the PWM controller has a system clock that must be enabled to access its registers, in addition to the per-channel input clocks. Get and enable it with devm_clk_get_optional_enabled() using the "core" name. The clock is optional, so existing SoCs and device trees that do not provide it keep working unchanged. Signed-off-by: Ronald Claveau --- drivers/pwm/pwm-meson.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 20e6cd07127c4..5ab07322e8d15 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -508,8 +508,13 @@ static int meson_pwm_init_channels_s4(struct pwm_chip *chip) struct device *dev = pwmchip_parent(chip); struct device_node *np = dev->of_node; struct meson_pwm *meson = to_meson_pwm(chip); + struct clk *core_clk; int i, ret; + core_clk = devm_clk_get_optional_enabled(dev, "core"); + if (IS_ERR(core_clk)) + return dev_err_probe(dev, PTR_ERR(core_clk), "Failed to get core clock\n"); + for (i = 0; i < MESON_NUM_PWMS; i++) { meson->channels[i].clk = of_clk_get(np, i); if (IS_ERR(meson->channels[i].clk)) -- 2.49.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic