From: Dave Hansen <dave.hansen@intel.com>
To: ludloff@gmail.com
Cc: Borislav Petkov <bp@alien8.de>,
"Ahmed S. Darwish" <darwi@linutronix.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
Ingo Molnar <mingo@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
Andrew Cooper <andrew.cooper3@citrix.com>,
"H. Peter Anvin" <hpa@zytor.com>,
Sean Christopherson <seanjc@google.com>,
David Woodhouse <dwmw2@infradead.org>,
Peter Zijlstra <peterz@infradead.org>,
Sohil Mehta <sohil.mehta@intel.com>,
John Ogness <john.ogness@linutronix.de>,
x86@kernel.org, x86-cpuid@lists.linux.dev,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: x86 CPUID mutable return values
Date: Tue, 22 Sep 2026 08:24:32 -0700 [thread overview]
Message-ID: <01a1d68b-a4e2-40e3-b3b8-c1046faa6c77@intel.com> (raw)
In-Reply-To: <CAKSQd8WqQdNDoEqM+PZNHg-yr_4VJTGYdV=bCbYfRDyR7kUjbg@mail.gmail.com>
On 9/22/26 01:43, Christian Ludloff wrote:
> On Mon, Sep 21, 2026 at 11:32 PM Dave Hansen <dave.hansen@intel.com> wrote:
>>
>> On 9/21/26 11:36, Christian Ludloff wrote:
>>> Q for Intel: is MSR FEATURE_CONFIG 0x13C bit 1 expected
>>> to affect CPUID 1.ECX.25 and 7.0.ECX.9 and 19.EBX.0/2, or
>>> just just a subset of them? Also, what about PCLMUL?
>>
>> Are you looking to document architecture or implementation here?
>
> Just the reality of mutable CPUID return values.
>
> Because it matters. When trying to cache them.
Of course.
I'm all for documenting this stuff. I wish it was more open. But I do
worry a bit that someone will read that, for example, "KL is immutable".
$CUSTOMER starts depending on it. Then, $CPU_VENDOR decides that was a
mistake and fixes it in a future implementation.
> Based on some experiments, I think that VAES
> does follow AES (i.e. is mutable as well), while
> KL and PCLMUL do not (i.e. are immutable) –
> so that's what I am seeking confirmation for.
Are you OK with just checking a recent implementation or do you need a
wider search of older implementations?
>> Honestly, FEATURE_CONFIG looks more like something that should have been in the BIOS writers' guide rather than the SDM.
>
> I for one appreciate that the SDM attempts to
> provide a list of mutable CPUID return values
> and that it has the FEATURE_CONFIG MSR.
>
> After all... the most recent public Intel BWG is
> more than 30 years old by now [aka P6 days],
> and https://en.wikipedia.org/wiki/Appendix_H
> was a thing that also happened back then. :)
>
> PS: Should Linux boot check/fix that LOCK?
I don't really feel a strong need to do it. I honestly don't know why
the lock bit is even there. I'd randomly _guess_ that Intel's
implementation was not certified for $THINGS and they got nervous and
asked to have a chicken bit exposed for it just so it couldn't
accidentally get used.
But, for Linux, the kernel doesn't currently munging the disable or lock
bits. If someone munges it with wrmsr(1), they get to keep the pieces
just like any old wrmsr(1) user. I'm struggling to think of a scenario
where being able to twiddle either of the bits could be useful to an
attacker.
So I'm not sure it's worth prodding, even if we think it's got a funny
value.
next prev parent reply other threads:[~2026-09-22 15:24 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 18:36 Christian Ludloff
2026-09-21 21:32 ` Dave Hansen
2026-09-22 8:43 ` Christian Ludloff
2026-09-22 15:24 ` Dave Hansen [this message]
2026-09-22 18:28 ` Christian Ludloff
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