Re: [PATCH v2 1/2] mtd: spi-nor: Add support for EN25Q80A

[<Tudor.Ambarus@microchip.com>]

On 02/18/2019 02:04 PM, Schrempf Frieder wrote:
> From: Frieder Schrempf <frieder.schrempf@kontron.de>
> 
> This adds support for the EON EN25Q80A, a 8Mb SPI NOR chip.
> It is used on i.MX6 boards by Kontron Electronics GmbH
> (N60xx, N61xx).
> It was only tested with a single data line connected, by writing and
> reading random data with dd.
> 
> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

> ---
> Changes in v2:
> ==============
> * Add information about boards using the chip and testing to the commit
>   message
> * Remove SPI_NOR_QUAD_READ as the chip does not support 1_1_4 read
>   command (0x6b)
> * Move the entry after en25q64 for alphabetical order
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 6e13bbd1aaa5..7d7436facc57 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1740,6 +1740,8 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "en25q32b",   INFO(0x1c3016, 0, 64 * 1024,   64, 0) },
>  	{ "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
>  	{ "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
> +	{ "en25q80a",   INFO(0x1c3014, 0, 64 * 1024,   16,
> +			SECT_4K | SPI_NOR_DUAL_READ) },
>  	{ "en25qh32",   INFO(0x1c7016, 0, 64 * 1024,   64, 0) },
>  	{ "en25qh128",  INFO(0x1c7018, 0, 64 * 1024,  256, 0) },
>  	{ "en25qh256",  INFO(0x1c7019, 0, 64 * 1024,  512, 0) },
>