From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932616AbdEUWCa (ORCPT ); Sun, 21 May 2017 18:02:30 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:33926 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756755AbdEUWCV (ORCPT ); Sun, 21 May 2017 18:02:21 -0400 From: Steve Longerbeam X-Google-Original-From: Steve Longerbeam To: Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Steve Longerbeam Subject: [PATCH] gpu: ipu-v3: vdic: include AUTO field order bit in ipu_vdi_set_field_order Date: Sun, 21 May 2017 15:02:10 -0700 Message-Id: <1495404130-11115-1-git-send-email-steve_longerbeam@mentor.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The field order selection in VDIC_C register uses different bits depending on whether the VDIC is receiving from a CSI ("AUTO") or from memory ("MAN"). Since the VDIC cannot receive from both CSI and memory at the same time, set or clear both field order bits to cover both cases. Signed-off-by: Steve Longerbeam --- drivers/gpu/ipu-v3/ipu-vdi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-vdi.c b/drivers/gpu/ipu-v3/ipu-vdi.c index f27bf5a..a663893 100644 --- a/drivers/gpu/ipu-v3/ipu-vdi.c +++ b/drivers/gpu/ipu-v3/ipu-vdi.c @@ -88,9 +88,9 @@ void ipu_vdi_set_field_order(struct ipu_vdi *vdi, v4l2_std_id std, u32 field) reg = ipu_vdi_read(vdi, VDI_C); if (top_field_0) - reg &= ~VDI_C_TOP_FIELD_MAN_1; + reg &= ~(VDI_C_TOP_FIELD_MAN_1 | VDI_C_TOP_FIELD_AUTO_1); else - reg |= VDI_C_TOP_FIELD_MAN_1; + reg |= VDI_C_TOP_FIELD_MAN_1 | VDI_C_TOP_FIELD_AUTO_1; ipu_vdi_write(vdi, reg, VDI_C); spin_unlock_irqrestore(&vdi->lock, flags); -- 2.7.4