From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937145AbeE3HQd (ORCPT ); Wed, 30 May 2018 03:16:33 -0400 Received: from mail-he1eur01on0043.outbound.protection.outlook.com ([104.47.0.43]:24753 "EHLO EUR01-HE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S935466AbeE3HQS (ORCPT ); Wed, 30 May 2018 03:16:18 -0400 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=anson.huang@nxp.com; From: Anson Huang To: shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, fabio.estevam@nxp.com, linux@armlinux.org.uk Cc: Linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] ARM: imx: add cpu idle support for i.MX6SLL Date: Wed, 30 May 2018 15:12:37 +0800 Message-Id: <1527664358-17844-2-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527664358-17844-1-git-send-email-Anson.Huang@nxp.com> References: <1527664358-17844-1-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: HK0PR03CA0071.apcprd03.prod.outlook.com (2603:1096:203:52::35) To VI1PR04MB1326.eurprd04.prod.outlook.com (2a01:111:e400:5187::12) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(7020095)(4652020)(5600026)(48565401081)(4534165)(4627221)(201703031133081)(201702281549075)(2017052603328)(7153060)(7193020);SRVR:VI1PR04MB1326; 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state1: WAIT mode with ARM power on; state2: WAIT mode with ARM power off. L2_PGE in GPC_CNTR needs to be cleared to support state2 cpu idle. Signed-off-by: Anson Huang --- arch/arm/mach-imx/cpuidle-imx6sx.c | 1 + arch/arm/mach-imx/mach-imx6sl.c | 5 ++++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach-imx/cpuidle-imx6sx.c index d0f14b7..243a108 100644 --- a/arch/arm/mach-imx/cpuidle-imx6sx.c +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c @@ -103,6 +103,7 @@ int __init imx6sx_cpuidle_init(void) { imx6_set_int_mem_clk_lpm(true); imx6_enable_rbc(false); + imx_gpc_set_l2_mem_power_in_lpm(false); /* * set ARM power up/down timing to the fastest, * sw2iso and sw can be set to one 32K cycle = 31us diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index c7a1ef1..183540e 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -42,7 +42,10 @@ static void __init imx6sl_init_late(void) if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); - imx6sl_cpuidle_init(); + if (cpu_is_imx6sl()) + imx6sl_cpuidle_init(); + else + imx6sx_cpuidle_init(); } static void __init imx6sl_init_machine(void) -- 2.7.4