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From: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Bartosz Golaszewski <brgl@kernel.org>,
	Magnus Damm <magnus.damm@gmail.com>, Biju <biju.das.au@gmail.com>
Cc: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: (subset) [PATCH v5 0/4] Add RZ/G3L PWRRDY power sequencing support
Date: Wed,  2 Sep 2026 12:48:34 +0200	[thread overview]
Message-ID: <178834610100.25291.2104164353458457127.b4-ty@oss.qualcomm.com> (raw)
In-Reply-To: <20260826122742.153643-1-biju.das.jz@bp.renesas.com>


On Wed, 26 Aug 2026 13:27:22 +0100, Biju wrote:
> Some RZ SoCs (e.g. RZ/G3L) have a PWRRDY register that signals power
> readiness for various IPs (USB, DSI, CSI, etc.) to their respective
> controllers. This register is part of the SYSC IP. Add a dedicated
> power sequencing driver to handle these signals.
> 
> This series is based on proposal for power sequence driver [1]
> for USB PWRRDY signal and DSI PWRRDY signal[2].
> 
> [...]

Applied, thanks!

[3/4] power: sequencing: Add Renesas RZ/G3L Power Ready driver
      https://git.kernel.org/brgl/c/3b04e9b8056e868c3e9a04cc74168c7c9a18746a

Best regards,
-- 
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

      parent reply	other threads:[~2026-09-02 10:48 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-26 12:27 Biju
2026-08-26 12:27 ` [PATCH v5 1/4] soc: renesas: rz-sysc: Register auxiliary device for PWRRDY power sequencer Biju
2026-08-26 12:27 ` [PATCH v5 2/4] power: sequencing: Fix build issue with COMPILE_TEST Biju
2026-08-26 12:27 ` [PATCH v5 3/4] power: sequencing: Add Renesas RZ/G3L Power Ready driver Biju
2026-09-01 16:15   ` Bartosz Golaszewski
2026-09-02  7:10     ` Geert Uytterhoeven
2026-09-02 10:48       ` Bartosz Golaszewski
2026-09-02 11:34         ` Geert Uytterhoeven
2026-08-26 12:27 ` [PATCH v5 4/4] soc: renesas: Kconfig: Select POWER_SEQUENCING_RENESAS_PWRRDY for R9A08G046 Biju
2026-09-02 10:44 ` (subset) [PATCH v5 0/4] Add RZ/G3L PWRRDY power sequencing support Bartosz Golaszewski
2026-09-02 10:48 ` Bartosz Golaszewski [this message]

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