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From: Oleg Zadorozhnyi =0A= =0A= The priority table is ordered: the slot an input occupies is its=0A= priority, and the device selects the lowest occupied slot whose signal is= =0A= qualified. Getting the priority is therefore a search of the table for=0A= the input, and setting it moves the input to the requested slot.=0A= =0A= An input absent from the table has no priority to report, and the core is= =0A= told so rather than handed a made-up number.=0A= =0A= Signed-off-by: Oleg Zadorozhnyi =0A= Assisted-by: Claude:claude-4-opus [chat]=0A= Signed-off-by: Ali Rouhi =0A= ---=0A= drivers/dpll/sit9531x/core.c | 76 +++++++++++++++++++++++---=0A= drivers/dpll/sit9531x/core.h | 8 +++=0A= drivers/dpll/sit9531x/dpll.c | 102 +++++++++++++++++++++++++++++++++++=0A= 3 files changed, 178 insertions(+), 8 deletions(-)=0A= =0A= diff --git a/drivers/dpll/sit9531x/core.c b/drivers/dpll/sit9531x/core.c=0A= index 25418485e975..484c94def578 100644=0A= --- a/drivers/dpll/sit9531x/core.c=0A= +++ b/drivers/dpll/sit9531x/core.c=0A= @@ -521,21 +521,81 @@ bool sit9531x_input_prio_present(struct sit9531x_dev = *sitdev, u8 pll_idx,=0A= }=0A= =0A= /*=0A= - * Rebuild a PLL's membership mask from the source codes of its priority= =0A= - * table. The mask is what the pin state getters test, so it is refreshed= =0A= - * from exactly the values the table holds -- here after a write, and once= =0A= - * per poll from the read-back in sit9531x_chan_state_fetch().=0A= + * sit9531x_input_prio_get - read an input's priority slot for a PLL=0A= + * @input_idx: input source in hardware encoding (see=0A= + * sit9531x_input_hw_src())=0A= + * @prio: output slot position (0 =3D highest)=0A= + *=0A= + * Reports the last slot this source occupied on this PLL. The value is= =0A= + * cached from the hardware table read at startup and refreshed after ever= y=0A= + * table write and poll read-back, so pin-get reflects hardware state with= out=0A= + * issuing synchronous register reads per pin. A source with no known slo= t=0A= + * falls back to the lowest-priority valid slot.=0A= + *=0A= + * Caller must hold sitdev->multiop_lock.=0A= + */=0A= +int sit9531x_input_prio_get(struct sit9531x_dev *sitdev, u8 pll_idx,=0A= + u8 input_idx, u8 *prio)=0A= +{=0A= + const struct sit9531x_chan *chan;=0A= + u8 slot;=0A= +=0A= + lockdep_assert_held(&sitdev->multiop_lock);=0A= +=0A= + if (pll_idx >=3D SIT9531X_NUM_PLLS)=0A= + return -EINVAL;=0A= + input_idx =3D sit9531x_prio_src_canon(sitdev, input_idx);=0A= + if (input_idx >=3D SIT9531X_PRIO_NUM_SRC)=0A= + return -EINVAL;=0A= +=0A= + chan =3D &sitdev->chan[pll_idx];=0A= + slot =3D chan->prio_last[input_idx];=0A= + if (!slot)=0A= + slot =3D SIT9531X_PRIO_MAX_SLOTS;=0A= +=0A= + *prio =3D slot - 1;=0A= +=0A= + return 0;=0A= +}=0A= +=0A= +/*=0A= + * Refresh a PLL's cached view of its priority table from the source codes= =0A= + * the table holds -- here after a write, and once per poll from the=0A= + * read-back in sit9531x_chan_state_fetch().=0A= + *=0A= + * The membership mask is what the pin state getters test; the per-slot=0A= + * copy and the last-slot-seen array are what priority get answers from,= =0A= + * so neither costs a register read per pin.=0A= */=0A= static void sit9531x_prio_mask_build(struct sit9531x_dev *sitdev, u8 pll_i= dx,=0A= const u8 *srcs)=0A= {=0A= + struct sit9531x_chan *chan =3D &sitdev->chan[pll_idx];=0A= + u8 first[SIT9531X_PRIO_NUM_SRC] =3D { 0 };=0A= u16 mask =3D 0;=0A= - u8 slot;=0A= + u8 slot, src, src_canon;=0A= =0A= - for (slot =3D 0; slot < SIT9531X_PRIO_MAX_SLOTS; slot++)=0A= - mask |=3D BIT(srcs[slot] & SIT9531X_PRIO_NIBBLE_MASK);=0A= + for (slot =3D 0; slot < SIT9531X_PRIO_MAX_SLOTS; slot++) {=0A= + src =3D srcs[slot] & SIT9531X_PRIO_NIBBLE_MASK;=0A= + chan->prio_srcs[slot] =3D src;=0A= + src_canon =3D sit9531x_prio_src_canon(sitdev, src);=0A= + if (src_canon >=3D SIT9531X_PRIO_NUM_SRC)=0A= + continue;=0A= +=0A= + mask |=3D BIT(src_canon);=0A= + if (!first[src_canon])=0A= + first[src_canon] =3D slot + 1;=0A= + }=0A= +=0A= + /*=0A= + * Assign unconditionally: a source that has left the table has no=0A= + * slot, and leaving its old one behind would keep reporting it as=0A= + * listed for as long as the device runs.=0A= + */=0A= + for (src =3D 0; src < SIT9531X_PRIO_NUM_SRC; src++)=0A= + chan->prio_last[src] =3D first[src];=0A= =0A= - sitdev->chan[pll_idx].prio_mask =3D mask;=0A= + chan->prio_mask =3D mask;=0A= }=0A= =0A= /* Attempts to release a forced holdover before reporting it stuck. */=0A= diff --git a/drivers/dpll/sit9531x/core.h b/drivers/dpll/sit9531x/core.h=0A= index f628bd5b7a97..1ab8ebfd78da 100644=0A= --- a/drivers/dpll/sit9531x/core.h=0A= +++ b/drivers/dpll/sit9531x/core.h=0A= @@ -129,6 +129,12 @@ struct sit9531x_out {=0A= * @ho_freeze: holdover freeze active=0A= * @ho_valid: holdover memory acquired, i.e. the holdover window=0A= * holds a valid estimate to fall back on=0A= + * @prio_srcs: cached copy of the priority table, one source code=0A= + * per slot; refreshed together with @prio_mask, so=0A= + * priority reads generate no register traffic=0A= + * @prio_last: slot each source occupies, plus one (0 =3D the source=0A= + * is not in the table); refreshed from the same scan=0A= + * as @prio_mask, so the two never disagree=0A= * @prio_mask: bit per hardware source code present in this PLL's=0A= * priority table, i.e. the sources it may select. Read=0A= * back from the table by the periodic worker and=0A= @@ -143,6 +149,8 @@ struct sit9531x_chan {=0A= bool inner_lol;=0A= bool ho_freeze;=0A= bool ho_valid;=0A= + u8 prio_srcs[SIT9531X_PRIO_MAX_SLOTS];=0A= + u8 prio_last[SIT9531X_PRIO_NUM_SRC];=0A= u16 prio_mask;=0A= };=0A= =0A= diff --git a/drivers/dpll/sit9531x/dpll.c b/drivers/dpll/sit9531x/dpll.c=0A= index ab9aa7db1839..e2ff21adfdb2 100644=0A= --- a/drivers/dpll/sit9531x/dpll.c=0A= +++ b/drivers/dpll/sit9531x/dpll.c=0A= @@ -469,10 +469,112 @@ sit9531x_dpll_input_pin_state_on_dpll_set(const stru= ct dpll_pin *pin,=0A= return rc;=0A= }=0A= =0A= +/*=0A= + * sit9531x_dpll_input_pin_prio_get - read input pin priority=0A= + *=0A= + * Reports the cached slot from sit9531x_input_prio_get(). The cache is= =0A= + * refreshed from hardware at startup and by periodic read-back, so pin-ge= t=0A= + * reports hardware priority without synchronous per-pin I2C reads.=0A= + */=0A= +static int=0A= +sit9531x_dpll_input_pin_prio_get(const struct dpll_pin *pin, void *pin_pri= v,=0A= + const struct dpll_device *dpll, void *dpll_priv,=0A= + u32 *prio, struct netlink_ext_ack *extack)=0A= +{=0A= + struct sit9531x_dpll_pin *dpin =3D pin_priv;=0A= + struct sit9531x_dpll *sitdpll =3D dpll_priv;=0A= + struct sit9531x_dev *sitdev =3D sitdpll->dev;=0A= + u8 slot;=0A= + int rc;=0A= +=0A= + mutex_lock(&sitdev->multiop_lock);=0A= + rc =3D sit9531x_input_prio_get(sitdev, sitdpll->id,=0A= + sit9531x_input_hw_src(dpin->id), &slot);=0A= + mutex_unlock(&sitdev->multiop_lock);=0A= + if (rc)=0A= + return rc;=0A= +=0A= + dpin->prio =3D slot;=0A= + *prio =3D slot;=0A= + return 0;=0A= +}=0A= +=0A= +/*=0A= + * sit9531x_dpll_input_pin_prio_set - set input pin priority=0A= + *=0A= + * writes input priority table on Page 1 via=0A= + * core.c sit9531x_input_prio_set(). Forces holdover during update.=0A= + */=0A= +static int=0A= +sit9531x_dpll_input_pin_prio_set(const struct dpll_pin *pin, void *pin_pri= v,=0A= + const struct dpll_device *dpll, void *dpll_priv,=0A= + u32 prio, struct netlink_ext_ack *extack)=0A= +{=0A= + struct dpll_pin *changed[SIT9531X_MAX_INPUTS + 1];=0A= + struct sit9531x_dpll_pin *sibling;=0A= + struct sit9531x_dpll_pin *dpin =3D pin_priv;=0A= + struct sit9531x_dpll *sitdpll =3D dpll_priv;=0A= + struct sit9531x_dev *sitdev =3D sitdpll->dev;=0A= + u8 changed_cnt =3D 0, hw_src, slot;=0A= + int get_rc, rc;=0A= +=0A= + if (dpin->dir !=3D DPLL_PIN_DIRECTION_INPUT) {=0A= + NL_SET_ERR_MSG(extack, "Priority applies only to input pins");=0A= + return -EINVAL;=0A= + }=0A= +=0A= + if (prio >=3D SIT9531X_PRIO_MAX_SLOTS) {=0A= + NL_SET_ERR_MSG(extack, "Priority out of range (0-10)");=0A= + return -EINVAL;=0A= + }=0A= +=0A= + mutex_lock(&sitdev->multiop_lock);=0A= + rc =3D sit9531x_input_prio_set(sitdev, sitdpll->id,=0A= + sit9531x_input_hw_src(dpin->id),=0A= + (u8)prio);=0A= + if (!rc) {=0A= + list_for_each_entry(sibling, &sitdpll->pins, list) {=0A= + if (!sit9531x_dpll_is_input_pin(sibling) ||=0A= + sit9531x_dpll_is_xo_pin(sibling))=0A= + continue;=0A= +=0A= + hw_src =3D sit9531x_input_hw_src(sibling->id);=0A= + get_rc =3D sit9531x_input_prio_get(sitdev, sitdpll->id, hw_src, &slot);= =0A= + if (get_rc)=0A= + continue;=0A= +=0A= + if (sibling->prio =3D=3D slot)=0A= + continue;=0A= +=0A= + sibling->prio =3D slot;=0A= + if (changed_cnt < ARRAY_SIZE(changed))=0A= + changed[changed_cnt++] =3D sibling->dpll_pin;=0A= + }=0A= + }=0A= + mutex_unlock(&sitdev->multiop_lock);=0A= +=0A= + if (rc =3D=3D -EINVAL) {=0A= + NL_SET_ERR_MSG(extack,=0A= + "Pin is not a reference of this DPLL; connect it first");=0A= + return rc;=0A= + }=0A= + if (rc) {=0A= + NL_SET_ERR_MSG(extack, "Failed to set input priority");=0A= + return rc;=0A= + }=0A= +=0A= + while (changed_cnt--)=0A= + dpll_pin_change_ntf(changed[changed_cnt]);=0A= +=0A= + return 0;=0A= +}=0A= +=0A= static const struct dpll_pin_ops sit9531x_dpll_input_pin_ops =3D {=0A= .direction_get =3D sit9531x_dpll_input_pin_direction_get,=0A= .state_on_dpll_get =3D sit9531x_dpll_input_pin_state_on_dpll_get,=0A= .state_on_dpll_set =3D sit9531x_dpll_input_pin_state_on_dpll_set,=0A= + .prio_get =3D sit9531x_dpll_input_pin_prio_get,=0A= + .prio_set =3D sit9531x_dpll_input_pin_prio_set,=0A= };=0A= =0A= /*=0A= -- =0A= 2.39.2 (Apple Git-143)=0A= =0A=