From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx1.white.stw.pengutronix.de (mx1.white.stw.pengutronix.de [185.203.200.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6680F39E9DD; Fri, 18 Sep 2026 06:07:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.200.13 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789711637; cv=none; b=UVr40w5q0xDdCfUlEQm1C5HPSgtDrxMe12y8Ohmg7LCai1o1rb+E9sy2YWMqw/hpN0AHit26YR/1QZQFKasPoHQ6rkpDxrYEd9zrhNpK+OunxRPmdw8H7tSdoUJSWDc+afHXH6+QiOFx0keAs+/km0EahKNbbuEV81dsMoz9uAM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789711637; c=relaxed/simple; bh=1JJVz9r1I2YKlPh7YDn7HbtgjT6XpDzjfnEG3nPQua8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IgGF8PSGFjYJcSSrpHm9RzeCtAAPfWImUrajsQihmGGBmQEpyX04LuHjEO8UCdbECf3sRDoZ4Kxh0Mn628MX9nx/EkxsfrJxhpKF4TBm1dTcDRMSK9y0Cgd5CAAZxR1ntqk27v8AIcS+f5/ei6bYhZF4Nr7ZQ1yknvjcX2Ic0t0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.200.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from [127.0.1.1] (unknown [IPv6:2a02:560:5dd5:4b00:9ebf:dff:fe00:fdb5]) (Authenticated sender: sha@pengutronix.de) by mx1.white.stw.pengutronix.de (Postfix) with ESMTPSA id EB9E3200927; Fri, 18 Sep 2026 08:07:05 +0200 (CEST) From: Sascha Hauer Date: Fri, 18 Sep 2026 08:07:03 +0200 Subject: [PATCH v4 3/4] arm64: dts: rockchip: rk3588: Add JPEG decoder node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260918-rockchip-jpegdec-v4-3-0dd97df47abb@pengutronix.de> References: <20260918-rockchip-jpegdec-v4-0-0dd97df47abb@pengutronix.de> In-Reply-To: <20260918-rockchip-jpegdec-v4-0-0dd97df47abb@pengutronix.de> To: Lucas Sinn , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Philipp Zabel Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sascha Hauer X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789711625; l=2122; i=s.hauer@pengutronix.de; s=20230412; h=from:subject:message-id; bh=1JJVz9r1I2YKlPh7YDn7HbtgjT6XpDzjfnEG3nPQua8=; b=eUuHUUyU7vVmW4lwsxTq1Fxazll4yoErjnLr0cZeTpiDOtHnHLd0BWx303WsXcNzhn02+u/jq JNo1kezXGGVD4mRh1zKQLZ8Hw9j8Xf+PqRV0gVpot+R3erWV8esHRbB X-Developer-Key: i=s.hauer@pengutronix.de; a=ed25519; pk=4kuc9ocmECiBJKWxYgqyhtZOHj5AWi7+d0n/UjhkwTg= Add device tree nodes for the Rockchip JPEG hardware decoder and its IOMMU on the RK3588. The decoder is at 0xfdb90000 with its MMU at 0xfdb90480. It takes the AXI and AHB clocks and resets, and sits in the VDPU power domain. The AXI clock is pinned to 600 MHz, which is the rate the downstream BSP runs it at; it is a dedicated clock, not shared with another block. Both blocks are entirely on-SoC and have no board dependency, so they are enabled unconditionally like the other codec blocks in this file. Assisted-by: Claude:claude-opus-5 Signed-off-by: Sascha Hauer --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi index fc1fdbfd31622..ce02a0f753e33 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1317,6 +1317,30 @@ rga: rga@fdb80000 { power-domains = <&power RK3588_PD_VDPU>; }; + jpegd: video-codec@fdb90000 { + compatible = "rockchip,rk3588-jpegd"; + reg = <0x0 0xfdb90000 0x0 0x400>; + interrupts = ; + clocks = <&cru ACLK_JPEG_DECODER>, <&cru HCLK_JPEG_DECODER>; + clock-names = "axi", "ahb"; + assigned-clocks = <&cru ACLK_JPEG_DECODER>; + assigned-clock-rates = <600000000>; + resets = <&cru SRST_A_JPEG_DECODER>, <&cru SRST_H_JPEG_DECODER>; + reset-names = "axi", "ahb"; + iommus = <&jpegd_mmu>; + power-domains = <&power RK3588_PD_VDPU>; + }; + + jpegd_mmu: iommu@fdb90480 { + compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg = <0x0 0xfdb90480 0x0 0x40>; + interrupts = ; + clocks = <&cru ACLK_JPEG_DECODER>, <&cru HCLK_JPEG_DECODER>; + clock-names = "aclk", "iface"; + power-domains = <&power RK3588_PD_VDPU>; + #iommu-cells = <0>; + }; + vepu121_0: video-codec@fdba0000 { compatible = "rockchip,rk3588-vepu121"; reg = <0x0 0xfdba0000 0x0 0x800>; -- 2.47.3