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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33c331d3f2csm14091444eec.28.2026.09.20.23.20.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Sep 2026 23:20:35 -0700 (PDT) From: Kathiravan Thirumoorthy Date: Mon, 21 Sep 2026 11:49:40 +0530 Subject: [PATCH 07/11] dt-bindings: qcom,ipq5424: add NSS MEMNOC clock and ICC IDs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260921-ipq_clk_changes-v1-7-d242e3d49648@oss.qualcomm.com> References: <20260921-ipq_clk_changes-v1-0-d242e3d49648@oss.qualcomm.com> In-Reply-To: <20260921-ipq_clk_changes-v1-0-d242e3d49648@oss.qualcomm.com> To: Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Georgi Djakov , Konrad Dybcio , Varadarajan Narayanan , Dmitry Baryshkov , Abel Vesa , Gokul Sriram Palanisamy , Sricharan Ramabadhran , Kathiravan T Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Kathiravan Thirumoorthy X-Mailer: b4 0.15.2 X-Proofpoint-GUID: bapcLdj-BY5XsbyaJkAPJSkfinlmDQZy X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDA4OSBTYWx0ZWRfX5H+Lis5BLIKs 2WCtDOgzz35cE/LW78DgZU7TD8QYIJ0vU8bnJMYxJztJFVF8GSE3GyDsRWqxYeGdZ8YCkv3Wg0X MNnawYvxDGZ51QulyfA8Iy6Tzs/LkskZfzuPSwjJyoOPYremuKIO8vPiFMLpAOgM0K7w3QShciK apYz3pjPj6n912ei9XUpxA/HmWaapPYAG7mvNdp/K64tRj0qgyeRSQW2vhxas2rdzWbVECdLum5 Wnj4sgLXybK4BM1liFQQD6TzNnKX6qm+9901qwuUNeTKdDfZA2I2lAKuKqlhbhcgjgdHk9eMgII 7CMvRJXdyZDSJZskFYvfpb9Orig0d5m9HRw7995x2/15xXWhqV6DCdJCpP8mPCYw+1ihJZWi3Rl uT2YNJPA9T0WM213/k/q3kOBX7Cgym2TiDVmYUeTb14JdzPvNW/EtcXxojHco+AafH4qZ6qzcpf 05ogu43XkSAEGeD3zcw== X-Authority-Analysis: v=2.4 cv=f8Ddl+yM c=1 sm=1 tr=0 ts=6ab0ccb5 cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=Y6j223gtehf2z1fR5tgA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDA4OSBTYWx0ZWRfXwJTbNq6ieo3t XXTGx1hvHX9fvSKGQv3ki2x/12KS2HC6KKrv7V0CraTvbee/uXhhZ85ISQwYRaIXRvWFVBeqh8I el6FDYDzjRFzvA/2RzRdzg01b5FEyJc= X-Proofpoint-ORIG-GUID: bapcLdj-BY5XsbyaJkAPJSkfinlmDQZy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_02,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 phishscore=0 adultscore=0 spamscore=0 clxscore=1015 suspectscore=0 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210089 Add clock IDs for gcc_nssnoc_memnoc_clk and gcc_nssnoc_memnoc_1_clk, which provide the NSSNOC-to-GEMNOC path required by the NSS block. As these clocks are exposed through the interconnect framework, add the corresponding ICC IDs as well. Signed-off-by: Kathiravan Thirumoorthy --- include/dt-bindings/clock/qcom,ipq5424-gcc.h | 4 ++++ include/dt-bindings/interconnect/qcom,ipq5424.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/include/dt-bindings/clock/qcom,ipq5424-gcc.h b/include/dt-bindings/clock/qcom,ipq5424-gcc.h index 3ae33a0fa002..b736cf42e9f2 100644 --- a/include/dt-bindings/clock/qcom,ipq5424-gcc.h +++ b/include/dt-bindings/clock/qcom,ipq5424-gcc.h @@ -153,5 +153,9 @@ #define GCC_IM_SLEEP_CLK 144 #define GCC_XO_CLK 145 #define GPLL0_OUT_AUX 146 +#define GCC_NSSNOC_MEMNOC_BFDCD_CLK_SRC 147 +#define GCC_NSSNOC_MEMNOC_DIV_CLK_SRC 148 +#define GCC_NSSNOC_MEMNOC_CLK 149 +#define GCC_NSSNOC_MEMNOC_1_CLK 150 #endif diff --git a/include/dt-bindings/interconnect/qcom,ipq5424.h b/include/dt-bindings/interconnect/qcom,ipq5424.h index 07b786bee7d6..50b883b16a12 100644 --- a/include/dt-bindings/interconnect/qcom,ipq5424.h +++ b/include/dt-bindings/interconnect/qcom,ipq5424.h @@ -40,6 +40,10 @@ #define SLAVE_CNOC_LPASS_CFG 35 #define MASTER_SNOC_LPASS 36 #define SLAVE_SNOC_LPASS 37 +#define MASTER_NSSNOC_MEMNOC 38 +#define SLAVE_NSSNOC_MEMNOC 39 +#define MASTER_NSSNOC_MEMNOC_1 40 +#define SLAVE_NSSNOC_MEMNOC_1 41 #define MASTER_CPU 0 #define SLAVE_L3 1 -- 2.34.1