From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D1EF4AC17D; Mon, 21 Sep 2026 14:53:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790002432; cv=none; b=rIp1t0Oz1PwRw3C3NYJeBm3bCj2BhNfGZqB3Y2D89POAcf7MMBv57OYOvAiS9GkzFXOpLi424AGskCaSYsw9FAWZz6nn4vBCkglxNr9WeR8XM2eAc82CAb2+kUH8CRtVWi1PtV1y7feJ3oe6QBr4jHu+TAWSinh93LY5kg5A3qw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790002432; c=relaxed/simple; bh=iYsxOGCuhF7XWYoqxDk+UPUV2lxavlesnho4EvO1H2U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mee0/jHgqhhfb3ACIEfl0gH6x9/jQ1QcrbS+tPLKwUDSdun3x2b/q48XD+W9bEZHNouzwpxAwsl7SlhEArKTI7bV6veuZj2lBE4IT9XSH4dVJ94ioTQ7fd5yCm+9wgQz+h21Pvwjml+tNjDOZniOPMquzIWZmk6sVbTwx43S0KA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=fQm76AQD; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="fQm76AQD" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id E92034E40D52; Mon, 21 Sep 2026 14:53:49 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id BBE0A5FFB2; Mon, 21 Sep 2026 14:53:49 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0AEC8103291B1; Mon, 21 Sep 2026 16:53:46 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790002428; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=k13HDNE1rJUSq0uCLZXSMqkE9k5YxUpfJcI0ebOcnHg=; b=fQm76AQDVNW5du+BeBnL/BuChXoy2BjharEsy3atUz0NWRcJM4z08+LENAQ92A64BF+nWf k+a9AJnfxFXPpt1Y1WQsYSdJ8Fui4CYyJevLQFaMma9zFCi8Q8Au4hQdO49mIfNARFgpuy E+HUeqorzzoFNMbMXiSAkWkX0625ARnbYqhKWj0Jf1BbrlSCfvEig0A1tFRnRgfmmfGQRW ttKT70nnfvixB6pxMycDiv06bnPsM7xiXbQzNI7nfGLnbDjEscPA/6KfiFQkwisM52yFVA pCn3egXC1a6an9JQwNqPcB/DM2tsz8lZcp5iJOixaLLaUGDUJmVFylNIxiss4A== From: "Richard Genoud (TI)" To: Nishanth Menon , Vignesh Raghavendra Cc: Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Udit Kumar , Abhash Kumar , Beleswar Padhi , Thomas Richard , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Genoud Subject: [PATCH v4 7/7] arm64: dts: ti: k3-j742s2-ti-ipc-firmware: Reserve memory for LPM metadata Date: Mon, 21 Sep 2026 16:53:25 +0200 Message-ID: <20260921145325.300025-8-richard.genoud@bootlin.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260921145325.300025-1-richard.genoud@bootlin.com> References: <20260921145325.300025-1-richard.genoud@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 Declare a carveout memory region to store LPM metadata on J742S2. For Jacinto devices, this memory region is needed for saving ATF context and the certificate information of ATF and OPTEE and DM image. This LPM metadata area is firewalled to be accessed only by TIFS. U-Boot R5 SPL/TIFS will use this area to save and restore: - ATF context - ATF certificate information - OPTEE certificate information - DM image (which has been copied in memory at boot time by U-Boot R5-SPL) At resume, U-Boot R5 SPL is executed and detects that the board is resuming (with a flag set in the PMIC), then it: - brings out of retention the DDR - retrieves the LPM memory region from DTS - authenticates certificates from LPM memory region and applies firewalls - asks TIFS to restore TFA and its own minimal context - starts TFA on remote proc - loads back DM image from memory and jumps to DM https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html#lpm-msg-lpm-save-addr As this is used by U-Boot SPL, bootph-pre-ram is added and the device is enabled. NB: This memory region is not part of DM memory (which is not retained at suspend) Signed-off-by: Prasanth Babu Mantena Signed-off-by: Richard Genoud (TI) --- arch/arm64/boot/dts/ti/k3-j742s2-evm.dts | 2 ++ .../dts/ti/k3-j742s2-ti-ipc-firmware.dtsi | 24 +++++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts index fcb7f05d7faf..583b672ef8e9 100644 --- a/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j742s2-evm.dts @@ -24,3 +24,5 @@ memory@80000000 { bootph-all; }; }; + +#include "k3-j742s2-ti-ipc-firmware.dtsi" diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi new file mode 100644 index 000000000000..d66bcd2f4e19 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j742s2-ti-ipc-firmware.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/** + * Device Tree Source for enabling IPC using TI SDK firmware on J42S2 SoCs + * + * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2026 Bootlin + */ + +&reserved_memory { + lpm_memory_region: memory@ab000000 { + reg = <0x00 0xab000000 0x00 0x00300000>; + no-map; + bootph-pre-ram; + }; +}; + +&mcu_r5fss0_core0 { + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>, + <&lpm_memory_region>; + memory-region-names = "dma", "firmware", "lpm-metadata"; + bootph-pre-ram; + status = "okay"; +};