From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2400048551C; Thu, 24 Sep 2026 15:15:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790262913; cv=none; b=GRYOLi22W5L1Y11DvXYl145w/4SQiJyV1pFYpOZuAsDlLXuJxq8kGAQs/YDYeI+O2iM9C4KROFDZFF1iHzaq4FzwW+o4nOVxgEsecdBQJ217ZPb+TbJgx4eaQNj2Hct/JUJ8sc4915hRY3dYYQ9sUdtQ/veNlhatHjbP4QV3vlA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790262913; c=relaxed/simple; bh=mys8d0QyT1jeqfYTCqWxqyuhDyI86uP8AaBBHLjc8CU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NNa2LogsFEtaDROACocw0ZqCPwmL8kYtpWSlzIEea5zlDZXs61Uq7DruE0wT7GP1KcEN/ByOoXGJaMAFmU/h0XyITRp5cXeGGLJ8RmRK5QvLotJuj8Y9eXFe7rxVtDHZN79zOSkHbHIpE4+XIWgLcEGaXmkjm5csXdr4fLPX3T8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GLcv5zNE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GLcv5zNE" Received: by smtp.kernel.org (Postfix) with ESMTPS id D11F9C2BCFD; Thu, 24 Sep 2026 15:15:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1790262912; bh=mys8d0QyT1jeqfYTCqWxqyuhDyI86uP8AaBBHLjc8CU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=GLcv5zNEzPO2gi90jXUd2VHnrxBDTuvDNerSCbLCXaezFQ/uj+q9oTmyqN/nI2MRz ZbY1RA3914RyPqpTUI1Zx6/ux5U9M4aorEA0fanq/CRpPqCPK4x8RWqGL6kFGDFDdr 4kVaCeOXl0WEp5iMG4UrZiqsoRY053tUJlKrm7fgoUGj9oi5Wvk0X/nWgpXvXLLWTA dRnb4A2aULq2wM7whNtepfsEEig/KNemcYc6ew+9eZk9slXEJLsHnK7Nx3tFjyIhA9 k1yVZ+im+niSwZQ47ab9O2RxzmUkXPzUrt1JcGhq4MCN5cJjEQQSaaD0xaKPnb0LTf J++hWGiqJ1SRg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4633C9830E; Thu, 24 Sep 2026 15:15:12 +0000 (UTC) From: Ronald Claveau via B4 Relay Date: Thu, 24 Sep 2026 17:14:30 +0200 Subject: [PATCH 3/3] arm64: dts: amlogic: t7: Add core clock to PWM controller nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260924-add-t7-sys-pwm-clk-v1-3-05b91e87f0a9@aliel.fr> References: <20260924-add-t7-sys-pwm-clk-v1-0-05b91e87f0a9@aliel.fr> In-Reply-To: <20260924-add-t7-sys-pwm-clk-v1-0-05b91e87f0a9@aliel.fr> To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiner Kallweit , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, Ronald Claveau X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=3527; i=linux-kernel-dev@aliel.fr; h=from:subject:message-id; bh=iQJmhI6/rtcZ/olaoAWuBun4MGQh6or5yJDIWByo+Dg=; b=owGbwMvMwCWm1SvKXP3cUInxtFoSQ9ZWu5oJNSeOKn6LOfv3f4uUkMLnoCN/9Zo0pVNPv1+zn f9D2p3qjlIWBjEuBlkxRZb+uZYn3l0+eubrHvUUmDmsTCBDGLg4BWAilm8ZGe54Bpl9538c7vxM yuCD7IKqg5e8nXc8f83a9pMx4NZk5nSG/6Ws5c/5AxtVKi2NmyU3bpO3qSv8Meva6umsy6rWWTV v4AQA X-Developer-Key: i=linux-kernel-dev@aliel.fr; a=openpgp; fpr=DFD863F61375BF917F0012173953305EF1D0EC3E X-Endpoint-Received: by B4 Relay for linux-kernel-dev@aliel.fr/default with auth_id=744 X-Original-From: Ronald Claveau Reply-To: linux-kernel-dev@aliel.fr From: Ronald Claveau Describe the system clock of each PWM controller (CLKID_SYS_PWM_*) as a third clock, and add the clock-names property expected by the updated binding: "clk_a", "clk_b" and "core". Signed-off-by: Ronald Claveau --- arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi index 8f3f1c0579a0f..83c597d418875 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7.dtsi @@ -692,7 +692,9 @@ pwm_ao_ef: pwm@30000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x30000 0x0 0x24>; clocks = <&clkc_periphs CLKID_PWM_AO_E>, - <&clkc_periphs CLKID_PWM_AO_F>; + <&clkc_periphs CLKID_PWM_AO_F>, + <&clkc_periphs CLKID_SYS_PWM_AO_EF>; + clock-names = "clk_a", "clk_b", "core"; #pwm-cells = <3>; status = "disabled"; }; @@ -701,7 +703,9 @@ pwm_ao_gh: pwm@32000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x32000 0x0 0x24>; clocks = <&clkc_periphs CLKID_PWM_AO_G>, - <&clkc_periphs CLKID_PWM_AO_H>; + <&clkc_periphs CLKID_PWM_AO_H>, + <&clkc_periphs CLKID_SYS_PWM_AO_GH>; + clock-names = "clk_a", "clk_b", "core"; #pwm-cells = <3>; status = "disabled"; }; @@ -715,7 +719,9 @@ pwm_ab: pwm@58000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x58000 0x0 0x24>; clocks = <&clkc_periphs CLKID_PWM_A>, - <&clkc_periphs CLKID_PWM_B>; + <&clkc_periphs CLKID_PWM_B>, + <&clkc_periphs CLKID_SYS_PWM_AB>; + clock-names = "clk_a", "clk_b", "core"; #pwm-cells = <3>; status = "disabled"; }; @@ -724,7 +730,9 @@ pwm_cd: pwm@5a000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x5a000 0x0 0x24>; clocks = <&clkc_periphs CLKID_PWM_C>, - <&clkc_periphs CLKID_PWM_D>; + <&clkc_periphs CLKID_PWM_D>, + <&clkc_periphs CLKID_SYS_PWM_CD>; + clock-names = "clk_a", "clk_b", "core"; #pwm-cells = <3>; status = "disabled"; }; @@ -733,7 +741,9 @@ pwm_ef: pwm@5c000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x5c000 0x0 0x24>; clocks = <&clkc_periphs CLKID_PWM_E>, - <&clkc_periphs CLKID_PWM_F>; + <&clkc_periphs CLKID_PWM_F>, + <&clkc_periphs CLKID_SYS_PWM_EF>; + clock-names = "clk_a", "clk_b", "core"; #pwm-cells = <3>; status = "disabled"; }; @@ -742,7 +752,9 @@ pwm_ao_ab: pwm@5e000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x5e000 0x0 0x24>; clocks = <&clkc_periphs CLKID_PWM_AO_A>, - <&clkc_periphs CLKID_PWM_AO_B>; + <&clkc_periphs CLKID_PWM_AO_B>, + <&clkc_periphs CLKID_SYS_PWM_AO_AB>; + clock-names = "clk_a", "clk_b", "core"; #pwm-cells = <3>; status = "disabled"; }; @@ -751,7 +763,9 @@ pwm_ao_cd: pwm@60000 { compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm"; reg = <0x0 0x60000 0x0 0x24>; clocks = <&clkc_periphs CLKID_PWM_AO_C>, - <&clkc_periphs CLKID_PWM_AO_D>; + <&clkc_periphs CLKID_PWM_AO_D>, + <&clkc_periphs CLKID_SYS_PWM_AO_CD>; + clock-names = "clk_a", "clk_b", "core"; #pwm-cells = <3>; status = "disabled"; }; -- 2.49.0