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Fri, 25 Sep 2026 01:46:52 -0700 (PDT) Received: from debian ([5.133.47.210]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4887a64f9bcsm5281953f8f.32.2026.09.25.01.46.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Sep 2026 01:46:52 -0700 (PDT) From: Srinivas Kandagatla To: Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Abel Vesa , Abel Vesa , Taniya Das , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v2 4/4] clk: qcom: Add lpass clock controller driver for Glymur Date: Fri, 25 Sep 2026 09:46:35 +0100 Message-ID: <20260925084635.112399-5-srinivas.kandagatla@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260925084635.112399-1-srinivas.kandagatla@oss.qualcomm.com> References: <20260925084635.112399-1-srinivas.kandagatla@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: F_w34P2XhGvUbrWuCPK6f7KogyjOvpDh X-Authority-Analysis: v=2.4 cv=MI71C8Zl c=1 sm=1 tr=0 ts=6ab634fe cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=ZsC4DHZuhs/kKio7QBcDoQ==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=9d4qlcpUcIswrQQTxZ8A:9 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI1MDAzNCBTYWx0ZWRfX8gihlWo3JYTB nqy+5Q9DcOySQ7Ss6qdY5EpdGxhq1SClRp3hYoQDH+HqBxDn75j61hvXVKDll3OE5JAUYfKwi7V dyM9FgvZSeIG0b2G6svD0kSePmbfWTY4QQeRqakKQNLNJvXWxh9Z61raFzQS+k4Bx8Bd9F254tG HLoVQJXhNcHVjZcf4QxR7GMg3dZrkmYCF1VL231Tr5DbEnPOYY4g6Ulao8y69AsfeyPVejMEc7h Ab9rA6PoMGHT2PamqXm6Bkm60Vm5jZt+GCTAhPijM4HVtDSjGqVuq2iz2hIqQTkF5R4HH+kUCTS Eb0jY0ay/2RtpbfzRR7x7wfz4CCzGbyACtk4Hf2bqwrv51xGasTIZObNI8gS4zo/toinzeEJFSB t+CuLykLAP2mBEngjCQtGRSVRNPzTPnBh90tBE7WLZRLScHHivKYtUeVYcImyKndGu+e/XT+Yx1 Shyih4DcG2E252ZOZag== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI1MDAzNCBTYWx0ZWRfXyU6RRjlSCzLW +enIiAUn2fKyQ2P5+TFzK8DXfQzf/JEjpITJ7Kp9eC5MRu0Be3s+9CaXEE2B5rLgRek4pDZOT0Q DmttxZ6xzaRgG1pwa1ER8Nx39Xmy8es= X-Proofpoint-GUID: F_w34P2XhGvUbrWuCPK6f7KogyjOvpDh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-25_02,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 malwarescore=0 clxscore=1015 spamscore=0 priorityscore=1501 impostorscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609250034 Add support for the lpass clock controller found on Glymur based devices. This would allow lpass peripheral loader drivers to control the clocks and bring the subsystems out of reset. Currently this patch only supports resets as the Q6DSP is in control of LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg channel. Signed-off-by: Srinivas Kandagatla Reviewed-by: Abel Vesa --- drivers/clk/qcom/lpasscc-glymur.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/clk/qcom/lpasscc-glymur.c b/drivers/clk/qcom/lpasscc-glymur.c index 356625dce99e..eda13686850c 100644 --- a/drivers/clk/qcom/lpasscc-glymur.c +++ b/drivers/clk/qcom/lpasscc-glymur.c @@ -37,10 +37,31 @@ static const struct qcom_cc_desc lpass_audiocc_glymur_reset_desc = { .num_resets = ARRAY_SIZE(lpass_audiocc_glymur_resets), }; +static const struct qcom_reset_map lpasscc_glymur_resets[] = { + [LPASS_AUDIO_SWR_TX_CGCR] = { 0xa028, 1 }, +}; + +static const struct regmap_config lpasscc_glymur_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .name = "lpass-tcsr", + .max_register = 0x12000, +}; + +static const struct qcom_cc_desc lpasscc_glymur_reset_desc = { + .config = &lpasscc_glymur_regmap_config, + .resets = lpasscc_glymur_resets, + .num_resets = ARRAY_SIZE(lpasscc_glymur_resets), +}; + static const struct of_device_id lpasscc_glymur_match_table[] = { { .compatible = "qcom,glymur-lpassaudiocc", .data = &lpass_audiocc_glymur_reset_desc, + }, { + .compatible = "qcom,glymur-lpasscc", + .data = &lpasscc_glymur_reset_desc, }, { } }; -- 2.53.0