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This supports SPI devices that operate at two distinct clock rates: a conservative rate always reachable without controller configuration, and a higher rate achievable only after controller-side configuration such as PHY tuning. With both properties set, spi-max-frequency gives the conservative pre-configuration rate and post_config_max_speed_hz carries the post-configuration target for the SPI-MEM layer. Zero when not set, preserving existing behaviour. Reviewed-by: Miquel Raynal Signed-off-by: Santhosh Kumar K --- drivers/spi/spi.c | 2 ++ include/linux/spi/spi.h | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 015d93680e5d..97bf58dacd06 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2809,6 +2809,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, /* Device speed */ if (!of_property_read_u32(nc, "spi-max-frequency", &value)) spi->max_speed_hz = value; + if (!of_property_read_u32(nc, "spi-max-post-config-frequency-hz", &value)) + spi->post_config_max_speed_hz = value; /* Device CS delays */ of_spi_parse_dt_cs_delay(nc, &spi->cs_setup, "spi-cs-setup-delay-ns"); diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index fb4baa0d3398..a2c46cc7dafe 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -141,6 +141,8 @@ extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg, * @max_speed_hz: Maximum clock rate to be used with this chip * (on this board); may be changed by the device's driver. * The spi_transfer.speed_hz can override this for each transfer. + * @post_config_max_speed_hz: Maximum clock rate achievable after controller + * configuration (e.g. PHY tuning); zero when not assigned. * @bits_per_word: Data transfers involve one or more words; word sizes * like eight or 12 bits are common. In-memory wordsizes are * powers of two bytes (e.g. 20 bit samples use 32 bits). @@ -201,6 +203,7 @@ struct spi_device { struct device dev; struct spi_controller *controller; u32 max_speed_hz; + u32 post_config_max_speed_hz; u8 bits_per_word; bool rt; #define SPI_NO_TX BIT(31) /* No transmit wire */ -- 2.34.1