From: Rob Herring <robh@kernel.org>
To: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
Cc: Srinivas Kandagatla <srini@kernel.org>,
Mark Brown <broonie@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
linux-sound@vger.kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>,
Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>,
Kumar Anurag Singh <kumar.singh@oss.qualcomm.com>,
Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
Subject: Re: [PATCH v8 01/10] ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding
Date: Tue, 6 Oct 2026 09:16:20 -0500 [thread overview]
Message-ID: <20261006141620.GA1950759-robh@kernel.org> (raw)
In-Reply-To: <20260928-b4-qaif-shikra-audio-v8-1-ac618057fe85@oss.qualcomm.com>
On Mon, Sep 28, 2026 at 06:22:51PM +0530, Harendra Gautam wrote:
> Add the Devicetree binding for the Qualcomm Audio Interface (QAIF) CPU DAI
> controller used on the Shikra audio platform.
>
> QAIF routes audio between system memory, external PCM/TDM/MI2S serial
> interfaces and the internal Bolero/WCD codec. Platform Devicetree files
> need a binding to describe the controller resources, DAI cells and per-
> interface AIF configuration, and named constants to avoid raw numeric IDs
> in sound-dai references and child-node reg values.
>
> Describe the MMIO region, interrupt, clocks, DMA IOMMU mapping and
> aif-interface child nodes required by the controller.
>
> Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com>
> ---
> .../bindings/sound/qcom,shikra-qaif-cpu.yaml | 305 +++++++++++++++++++++
> 1 file changed, 305 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/sound/qcom,shikra-qaif-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,shikra-qaif-cpu.yaml
> new file mode 100644
> index 000000000000..5cabbe54d6fd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/qcom,shikra-qaif-cpu.yaml
> +
> + reg:
> + maxItems: 1
> + description: QAIF core registers
Drop the description.
> +
> + interrupts:
> + maxItems: 1
> + description:
> + QAIF summary interrupt for this Execution Engine. Signals DMA period
> + completion, buffer underflow/overflow, error response, audio interface
> + underflow/overflow, interface-group done, rate detector and VFR events.
> +
> + iommus:
> + maxItems: 1
> + description: Phandle to apps_smmu node with sid mask
Drop. The exact provider is outside the scope of this binding.
[...]
> +patternProperties:
> + '^aif@[0-9a-f]+$':
> + type: object
> + description:
> + QAIF AIF interface child node for PCM, TDM or MI2S configuration.
> +
> + properties:
> + reg:
> + maxItems: 1
> + description:
> + DAI ID of the AIF interface (QAIF_MI2S_AIF* or QAIF_TDM_AIF*).
> +
> + dai-format:
> + description: Serial audio interface format (MI2S, TDM or PCM).
> + enum: [i2s, dsp_a, dsp_b]
> +
> + dai-tdm-slot-width:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [8, 16, 24, 32]
> + description:
> + Slot width in bits.
> +
> + dai-tdm-slot-num:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Number of slots per lane.
> + minimum: 1
> + maximum: 32
> +
> + dai-tdm-slot-rx-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Active RX slots, one entry per slot. A nonzero value marks the
> + slot as active.
> + minItems: 1
> + maxItems: 32
> +
> + dai-tdm-slot-tx-mask:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
These are all common properties. Don't redefine the type. You need to
reference the common schema (at the object/node level, not per
property).
> + description:
> + Active TX slots, one entry per slot. A nonzero value marks the
> + slot as active.
> + minItems: 1
> + maxItems: 32
> +
> + qcom,qaif-aif-lane-map:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Per-lane direction map, one entry per lane starting from lane 0.
> + Use 0 for TX (output/speaker) and 1 for RX (input/mic).
> + minItems: 1
> + maxItems: 8
> + items:
> + enum: [0, 1]
Can't you use a single uint32 bit mask for this?
Rob
next prev parent reply other threads:[~2026-10-06 14:16 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-28 12:52 [PATCH v8 00/10] ASoC: qcom: Add QAIF driver for Shikra audio platform Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 01/10] ASoC: dt-bindings: qcom,shikra-qaif-cpu: Add binding Harendra Gautam
2026-10-06 14:16 ` Rob Herring [this message]
2026-09-28 12:52 ` [PATCH v8 02/10] ASoC: qcom: Add QAIF shared data structures and variant interface Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 03/10] ASoC: qcom: Add QAIF hardware register map Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 04/10] ASoC: qcom: Add QAIF CPU DAI ops, regmap, DT parsing and platform init Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 05/10] ASoC: soc-core: Add snd_soc_of_xlate_dai_name() generic helper Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 06/10] ASoC: qcom: Switch lpass-cpu and qaif-cpu to snd_soc_of_xlate_dai_name() Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 07/10] ASoC: qcom: Add QAIF PCM operations Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 08/10] ASoC: qcom: Add QAIF IRQ handling and platform register Harendra Gautam
2026-09-29 11:36 ` Ajay Kumar Nandam
2026-09-30 5:28 ` Harendra Gautam
2026-09-28 12:52 ` [PATCH v8 09/10] ASoC: qcom: Add Shikra QAIF support Harendra Gautam
2026-09-28 12:53 ` [PATCH v8 10/10] MAINTAINERS: Add Qualcomm QAIF driver entry Harendra Gautam
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