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[67.168.198.145]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3b07c5844acsm462228a91.4.2026.11.02.11.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Nov 2026 11:00:12 -0800 (PST) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, Anna Maniscalco , Rob Clark , Abhinav Kumar , Akhil P Oommen , David Airlie , Dmitry Baryshkov , Jessica Zhang , Konrad Dybcio , linux-kernel@vger.kernel.org (open list), Marijn Suijten , Sean Paul , Simona Vetter Subject: [PATCH v2 0/4] drm/msm: Decouple IFPC disable and sysprof Date: Mon, 2 Nov 2026 11:00:03 -0800 Message-ID: <20261102190010.720443-1-robin.clark@oss.qualcomm.com> X-Mailer: git-send-email 2.56.0 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: xLfKxg-xSOAGS1ydRpBKEio3hD1C0QRY X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTAyMDA3NSBTYWx0ZWRfX7hDqNP5PBkV3 tw3zeY9Mnpy93HVT7tx9+gECGgdqZ6hQlh6XjYgBDJm+XiLItLDJWtYIjJT+QPv7u0qHB2ndoEB wux+EWlqwC8+crjoqxMoy/3JdFZrIm9gO76zi/tw2hdhCIeyWVRau3YNGQCH2a2uz/xm+vvD/gw mKuwxccvmzKQDLYuADU99+TM/MyRxPPGMmd+nrQnDbjkpSCKaTD0AstMz1Uo9rsByP7OGUeWnEb OL1coFcA7HG7ZyOMLMSSpxsS1jki3pWkUlPg7f2kqzxeED692/AOsZk6xtA1RMT9c7ZstxzZsQx 9TAGrngh2JWWvqlpZlDyK+WDur+BcJ0lF1Y12oG3JKCbwgkQ1aiO20ynYYitkHnPEJNrnfdjwum diDfpTI2I800F9H9Qwa7S37wSAxnqwviRpSjwJ0Z+/NqdS6GdCLpU/iQumrZGbtxMG0AZB1SkbS ZFdRHUaP4/94qcTEuNw== X-Proofpoint-Spam-Info: AW1haW4tMjYxMTAyMDA3NSBTYWx0ZWRfX8nT+g1W01tOD kVLXXtyFk6Kt++uADPMGFBwzlaxmVfBv3YTE4yEpXPprkFxNJ0ak+Eixyl8niveor0zHzfNwTGS SyiNpWA17r7czh6Hqr/bnMZlTHpo+cY= X-Proofpoint-GUID: xLfKxg-xSOAGS1ydRpBKEio3hD1C0QRY X-Authority-Analysis: v=2.4 cv=NZlzRGD4 c=1 sm=1 tr=0 ts=6ae8ddbe cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=6Rn/7xRx7Ub4NEhlm8k1cw==:17 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=e5mUnYsNAAAA:8 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=WAnUiRRfp7J0bigzDMEA:9 a=uKXjsCUrEbL0IQVhDsJ9:22 a=Vxmtnl_E_bksehYqCbjh:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-02_05,2026-11-02_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 phishscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2611020075 Convert IFPC-disable into it's own refcnt so that multiple threads can request IFPC to be disabled without stomping on each other. Extracted out of gen8 GPU state capture series[1], as other than fixing a missing IFPC disable in debugfs state capture path, it is unrelated. [1] https://patchwork.freedesktop.org/series/176505/ v2: - Fix double acquire of gmu->lock - Fix missing a8xx hw_init() path - Link to v1: https://lore.kernel.org/all/20261101174631.23637-1-robin.clark@oss.qualcomm.com/ Rob Clark (4): drm/msm: Rework IFPC disable drm/msm: Add cleanup help for disabling IFPC drm/msm/debugfs: Use cleanup.h for gpu state dump drm/msm: Inhibit IFPC for state snapshot drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 32 +++++++++++++++------------ drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 ++++------ drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 ++- drivers/gpu/drm/msm/adreno/a8xx_gpu.c | 6 +---- drivers/gpu/drm/msm/msm_debugfs.c | 31 +++++++++++--------------- drivers/gpu/drm/msm/msm_gpu.c | 1 + drivers/gpu/drm/msm/msm_gpu.h | 30 +++++++++++++++++++++---- drivers/gpu/drm/msm/msm_perfcntr.c | 7 +----- drivers/gpu/drm/msm/msm_submitqueue.c | 10 +++++---- 9 files changed, 72 insertions(+), 60 deletions(-) -- 2.56.0