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From: Kumar Gala <galak@codeaurora.org>
To: Sricharan R <r.sricharan@ti.com>
Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-doc@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <tglx@linutronix.de>,
	<linus.walleij@linaro.org>, <santosh.shilimkar@ti.com>,
	<linux@arm.linux.org.uk>, <tony@atomide.com>, <rnayak@ti.com>,
	<marc.zyngier@arm.com>, <grant.likely@linaro.org>,
	<rob.herring@calxeda.com>, <mark.rutland@arm.com>
Subject: Re: [RFC PATCH 2/6] DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP
Date: Thu, 24 Oct 2013 06:00:02 -0500	[thread overview]
Message-ID: <202C69F5-3DEB-4735-9CE3-13B38126BD68@codeaurora.org> (raw)
In-Reply-To: <5268F9C5.3090106@ti.com>


On Oct 24, 2013, at 5:43 AM, Sricharan R wrote:

> Hi Kumar,
> 
> On Thursday 24 October 2013 03:03 PM, Kumar Gala wrote:
>> On Sep 30, 2013, at 8:59 AM, Sricharan R wrote:
>> 
>>> Some socs have a large number of interrupts requests to service
>>> the needs of its many peripherals and subsystems. All of the
>>> interrupt lines from the subsystems are not needed at the same
>>> time, so they have to be muxed to the irq-controller appropriately.
>>> In such places a interrupt controllers are preceded by an CROSSBAR
>>> that provides flexibility in muxing the device requests to the controller
>>> inputs.
>>> 
>>> This driver takes care a allocating a free irq and then configuring the
>>> crossbar IP as a part of the mpu's irqchip callbacks. crossbar_init should
>>> be called right before the irqchip_init, so that it is setup to handle the
>>> irqchip callbacks.
>>> 
>>> Cc: Thomas Gleixner <tglx@linutronix.de>
>>> Cc: Linus Walleij <linus.walleij@linaro.org>
>>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>>> Cc: Russell King <linux@arm.linux.org.uk>
>>> Cc: Tony Lindgren <tony@atomide.com>
>>> Cc: Rajendra Nayak <rnayak@ti.com>
>>> Cc: Marc Zyngier <marc.zyngier@arm.com>
>>> Cc: Grant Likely <grant.likely@linaro.org>
>>> Cc: Rob Herring <rob.herring@calxeda.com>
>>> Signed-off-by: Sricharan R <r.sricharan@ti.com>
>>> ---
>>> .../devicetree/bindings/arm/omap/crossbar.txt      |   27 +++
>>> drivers/irqchip/Kconfig                            |    8 +
>>> drivers/irqchip/Makefile                           |    1 +
>>> drivers/irqchip/irq-crossbar.c                     |  195 ++++++++++++++++++++
>>> include/linux/irqchip/irq-crossbar.h               |   11 ++
>>> 5 files changed, 242 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/arm/omap/crossbar.txt
>>> create mode 100644 drivers/irqchip/irq-crossbar.c
>>> create mode 100644 include/linux/irqchip/irq-crossbar.h
>>> 
>>> diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
>>> new file mode 100644
>>> index 0000000..cdec2cd
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
>>> @@ -0,0 +1,27 @@
>>> +Some socs have a large number of interrupts requests to service
>>> +the needs of its many peripherals and subsystems. All of the
>>> +interrupt lines from the subsystems are not needed at the same
>>> +time, so they have to be muxed to the irq-controller appropriately.
>>> +In such places a interrupt controllers are preceded by an CROSSBAR
>>> +that provides flexibility in muxing the device requests to the controller
>>> +inputs.
>>> +
>>> +Required properties:
>>> +- compatible : Should be "ti,irq-crossbar"
>>> +- reg: Base address and the size of the crossbar registers.
>>> +- max-irqs: Total number of irqs available at the interrupt controller.
>> Should be 'ti,max-irqs
> Ok, will correct.
>>> +- reg-size: Size of a individual register in bytes. Every individual
>>> +	    register is assumed to be of same size. Valid sizes are 1, 2, 4.
>> Is this something that really needs to be encoded in the dts?
>> 
>> If we keep it should be ti,reg-size
> Currently, this is the only IP with a fixed register-size.
> So this can be in the driver also. I thought keeping it
> DT will avoid any hard-coding in driver.

I'd go with less in the DT at this point, if in the future you need this you can always add it later.

>>> +- irqs-reserved: List of the reserved irq lines that are not muxed using
>>> +		 crossbar. These interrupt lines are reserved in the soc,
>>> +		 so crossbar bar driver should not consider them as free
>>> +		 lines.
>>> +
>> ti,irqs-reserved
> Ok, will correct
>>> +Examples:
>>> +		crossbar_mpu: @4a020000 {
>> Did you mean for there to be a label and no node name?
>> 
> ya, name is missing. Will add.
>>> +			compatible = "ti,irq-crossbar";
>>> +			reg = <0x4a002a48 0x130>;
>>> +			max-irqs = <160>;
>>> +			reg-size = <2>;
>>> +			irqs-reserved = <0 1 2 3 5 6 131 132 139 140>;
>>> +		};
> 
> Regards,
> Sricharan

- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation


  reply	other threads:[~2013-10-24 13:30 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-30 13:59 [RFC PATCH 0/6] DRIVERS: IRQCHIP: Add support for crossbar IP Sricharan R
2013-09-30 13:59 ` [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs Sricharan R
2013-09-30 14:16   ` Marc Zyngier
2013-09-30 14:22     ` Santosh Shilimkar
2013-09-30 14:28       ` Marc Zyngier
2013-09-30 15:00       ` Sricharan R
2013-10-08 11:23     ` Linus Walleij
2013-10-24  9:12   ` Thomas Gleixner
2013-10-24 10:21     ` Sricharan R
2013-10-24  9:38   ` Kumar Gala
2013-10-24 10:44     ` Sricharan R
2013-09-30 13:59 ` [RFC PATCH 2/6] DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP Sricharan R
2013-10-24  9:20   ` Thomas Gleixner
2013-10-24 10:21     ` Sricharan R
2013-10-24  9:33   ` Kumar Gala
2013-10-24 10:43     ` Sricharan R
2013-10-24 11:00       ` Kumar Gala [this message]
2013-09-30 13:59 ` [RFC PATCH 3/6] ARM: DTS: DRA: Add crossbar device binding Sricharan R
2013-09-30 13:59 ` [RFC PATCH 4/6] ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar inputs Sricharan R
2013-09-30 13:59 ` [RFC PATCH 5/6] ARM: OMAP4+: Correct Wakeup-gen code to use physical irq number Sricharan R
2013-09-30 13:59 ` [RFC PATCH 6/6] ARM: DRA: Enable Crossbar IP support for DRA7XX Sricharan R
2013-09-30 14:19 ` [RFC PATCH 0/6] DRIVERS: IRQCHIP: Add support for crossbar IP Santosh Shilimkar
2013-09-30 15:09 ` Rob Herring
2013-10-01 11:13   ` Sricharan R
2013-10-01 13:48     ` Rob Herring
2013-10-01 13:57       ` Santosh Shilimkar
2013-10-01 14:53         ` Rob Herring
2013-10-01 15:07           ` Santosh Shilimkar
2013-10-15  7:35             ` Sricharan R
2013-10-24  8:57       ` Thomas Gleixner

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