Re: [PATCH net-next v2 4/4] net: dsa: soce: Add basic support for SoC-e switch IP cores

[Andrew Lunn <andrew@lunn.ch>]

> Although mdio-mux-mmioreg might work, I have realized that it is not
> suitable here.
> 
> According to the switch documentation, the bus selector occupies bits
> 26:16 of the MDIO control register, while bit 0 is the transaction
> start/busy bit. A partial write might trigger an operation before the
> other fields have been updated.

Maybe. I can see at minimum it is a bit messy.  The mux would need to
write the upper bits, but set the lower start/busy to 0. The MDIO
driver would then need to read back the register, OR in the bits it
wants to set, and set the start bit.

This start bit is pretty common, and generally, writes without it set
are safe. But you need to test it on this particular hardware.

> Also accessing this register without checking the controller state
> could interfere with an active or failed transaction and introduce
> races (as noted by Netdev-Sashiko).

The mdio mux framework should take care of all the locking for you.
Take a look a mdio_mux_read(). It takes the lock of the real MDIO bus
controller, sets the mux, performs the read, and then releases the
lock.

The only thing you need to be careful of is write must wait around for
the write to complete before returning. Some MDIO bus implementations
don't wait, they leave it running, and do a check the bus is idle
before doing the next operation.

       Andrew