[RFC PATCH v3 15/27] KVM: SVM: Set VGIF in VMSA area for Secure AVIC guests

["Naveen N Rao (AMD)" <naveen@kernel.org>]

From: Kishon Vijay Abraham I <kvijayab@amd.com>

In Secure AVIC mode, VGIF is read from the VMSA (vintr_ctrl field), and
the corresponding bit in VMCB control area (int_ctl field) is ignored.
Set this bit in the BSP's VMSA so that interrupts are not masked. It is
up to the guest to set this bit in AP's VMSA that it prepares.

Signed-off-by: Kishon Vijay Abraham I <kvijayab@amd.com>
Co-developed-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
Co-developed-by: Naveen N Rao (AMD) <naveen@kernel.org>
Signed-off-by: Naveen N Rao (AMD) <naveen@kernel.org>
---
 arch/x86/kvm/svm/sev.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index 00cb45ce145f..f5b9ff69dbc1 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -1031,6 +1031,10 @@ static int sev_es_sync_vmsa(struct vcpu_svm *svm)
 
 	save->sev_features = sev->vmsa_features;
 
+	/* Secure AVIC loads the below from the VMSA, rather than the VMCB */
+	if (snp_is_secure_avic_enabled(vcpu->kvm))
+		save->vintr_ctrl |= V_GIF_MASK;
+
 	/*
 	 * Skip FPU and AVX setup with KVM_SEV_ES_INIT to avoid
 	 * breaking older measurements.
-- 
2.54.0