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From: Andy Lutomirski <luto@kernel.org>
To: X86 ML <x86@kernel.org>
Cc: Borislav Petkov <bpetkov@suse.de>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Brian Gerst <brgerst@gmail.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Josh Poimboeuf <jpoimboe@redhat.com>,
	Andy Lutomirski <luto@kernel.org>
Subject: [PATCH v2 02/18] x86/asm/64: Allocate and enable the SYSENTER stack
Date: Tue, 21 Nov 2017 20:43:57 -0800	[thread overview]
Message-ID: <5ea2f30892390d1abd37c1597e15f7ec5677a850.1511325444.git.luto@kernel.org> (raw)
In-Reply-To: <cover.1511325444.git.luto@kernel.org>
In-Reply-To: <cover.1511325444.git.luto@kernel.org>

This will simplify future changes that want scratch variables early in
the SYSENTER handler -- they'll be able to spill registers to the
stack.  It also lets us get rid of a SWAPGS_UNSAFE_STACK user.

This does not depend on CONFIG_IA32_EMULATION because we'll want the
stack space even without IA32 emulation.

As far as I can tell, the reason that this wasn't done from day 1 is
that we use IST for #DB and #BP, which is IMO rather nasty and causes
a lot more problems than it solves.  But, since #DB uses IST, we don't
actually need a real stack for SYSENTER (because SYSENTER with TF set
will invoke #DB on the IST stack rather than the SYSENTER stack).
I want to remove IST usage from these vectors some day, and this patch
is a prerequisite for that as well.

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Andy Lutomirski <luto@kernel.org>
---
 arch/x86/entry/entry_64_compat.S | 2 +-
 arch/x86/include/asm/processor.h | 3 ---
 arch/x86/kernel/asm-offsets.c    | 5 +++++
 arch/x86/kernel/asm-offsets_32.c | 5 -----
 arch/x86/kernel/cpu/common.c     | 4 +++-
 arch/x86/kernel/process.c        | 2 --
 arch/x86/kernel/traps.c          | 3 +--
 7 files changed, 10 insertions(+), 14 deletions(-)

diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
index 568e130d932c..dcc6987f9bae 100644
--- a/arch/x86/entry/entry_64_compat.S
+++ b/arch/x86/entry/entry_64_compat.S
@@ -48,7 +48,7 @@
  */
 ENTRY(entry_SYSENTER_compat)
 	/* Interrupts are off on entry. */
-	SWAPGS_UNSAFE_STACK
+	SWAPGS
 	movq	PER_CPU_VAR(cpu_current_top_of_stack), %rsp
 
 	/*
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 2db7cf720b04..789dad5da20f 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -339,14 +339,11 @@ struct tss_struct {
 	 */
 	unsigned long		io_bitmap[IO_BITMAP_LONGS + 1];
 
-#ifdef CONFIG_X86_32
 	/*
 	 * Space for the temporary SYSENTER stack.
 	 */
 	unsigned long		SYSENTER_stack_canary;
 	unsigned long		SYSENTER_stack[64];
-#endif
-
 } ____cacheline_aligned;
 
 DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss);
diff --git a/arch/x86/kernel/asm-offsets.c b/arch/x86/kernel/asm-offsets.c
index 8ea78275480d..b275863128eb 100644
--- a/arch/x86/kernel/asm-offsets.c
+++ b/arch/x86/kernel/asm-offsets.c
@@ -93,4 +93,9 @@ void common(void) {
 
 	BLANK();
 	DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
+
+	/* Offset from cpu_tss to SYSENTER_stack */
+	OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
+	/* Size of SYSENTER_stack */
+	DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct *)0)->SYSENTER_stack));
 }
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index dedf428b20b6..52ce4ea16e53 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -50,11 +50,6 @@ void foo(void)
 	DEFINE(TSS_sysenter_sp0, offsetof(struct tss_struct, x86_tss.sp0) -
 	       offsetofend(struct tss_struct, SYSENTER_stack));
 
-	/* Offset from cpu_tss to SYSENTER_stack */
-	OFFSET(CPU_TSS_SYSENTER_stack, tss_struct, SYSENTER_stack);
-	/* Size of SYSENTER_stack */
-	DEFINE(SIZEOF_SYSENTER_stack, sizeof(((struct tss_struct *)0)->SYSENTER_stack));
-
 #ifdef CONFIG_CC_STACKPROTECTOR
 	BLANK();
 	OFFSET(stack_canary_offset, stack_canary, canary);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 13ae9e5eec2f..1243f732810b 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1384,7 +1384,9 @@ void syscall_init(void)
 	 * AMD doesn't allow SYSENTER in long mode (either 32- or 64-bit).
 	 */
 	wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)__KERNEL_CS);
-	wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
+	wrmsrl_safe(MSR_IA32_SYSENTER_ESP,
+		    (unsigned long)this_cpu_ptr(&cpu_tss) +
+		    offsetofend(struct tss_struct, SYSENTER_stack));
 	wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);
 #else
 	wrmsrl(MSR_CSTAR, (unsigned long)ignore_sysret);
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 97fb3e5737f5..35d674157fda 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -71,9 +71,7 @@ __visible DEFINE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss) = {
 	  */
 	.io_bitmap		= { [0 ... IO_BITMAP_LONGS] = ~0 },
 #endif
-#ifdef CONFIG_X86_32
 	.SYSENTER_stack_canary	= STACK_END_MAGIC,
-#endif
 };
 EXPORT_PER_CPU_SYMBOL(cpu_tss);
 
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 989514c94a55..81841f27beff 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -795,14 +795,13 @@ dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
 	debug_stack_usage_dec();
 
 exit:
-#if defined(CONFIG_X86_32)
 	/*
 	 * This is the most likely code path that involves non-trivial use
 	 * of the SYSENTER stack.  Check that we haven't overrun it.
 	 */
 	WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
 	     "Overran or corrupted SYSENTER stack\n");
-#endif
+
 	ist_exit(regs);
 }
 NOKPROBE_SYMBOL(do_debug);
-- 
2.13.6

  parent reply	other threads:[~2017-11-22  4:44 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-22  4:43 [PATCH v2 00/18] Entry stack switching Andy Lutomirski
2017-11-22  4:43 ` [PATCH v2 01/18] x86/entry/64: Fix entry_SYSCALL_64_after_hwframe IRQ tracing Andy Lutomirski
2017-11-22  5:35   ` Ingo Molnar
2017-11-22  7:45   ` [tip:x86/urgent] x86/entry/64: Fix entry_SYSCALL_64_after_hwframe() " tip-bot for Andy Lutomirski
2017-11-22  4:43 ` Andy Lutomirski [this message]
2017-11-22  4:43 ` [PATCH v2 03/18] x86/dumpstack: Add get_stack_info() support for the SYSENTER stack Andy Lutomirski
2017-11-22 12:10   ` Borislav Petkov
2017-11-22  4:43 ` [PATCH v2 04/18] x86/gdt: Put per-cpu GDT remaps in ascending order Andy Lutomirski
2017-11-22 11:05   ` Borislav Petkov
2017-11-22 15:26     ` Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 05/18] x86/fixmap: Generalize the GDT fixmap mechanism Andy Lutomirski
2017-11-22 15:33   ` Borislav Petkov
2017-11-22 17:16     ` Andy Lutomirski
2017-11-22 17:32       ` Borislav Petkov
2017-11-23 15:24         ` Andy Lutomirski
2017-11-23 19:24   ` Thomas Gleixner
2017-11-22  4:44 ` [PATCH v2 06/18] x86/kasan/64: Teach KASAN about the cpu_entry_area Andy Lutomirski
2017-11-22  6:19   ` Ingo Molnar
2017-11-22  9:05   ` Andrey Ryabinin
2017-11-22 15:22     ` Andy Lutomirski
2017-11-23 10:08       ` Andrey Ryabinin
2017-11-23 15:22         ` Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 07/18] x86/asm: Fix assumptions that the HW TSS is at the beginning of cpu_tss Andy Lutomirski
2017-11-22 19:06   ` Borislav Petkov
2017-11-22  4:44 ` [PATCH v2 08/18] x86/dumpstack: Handle stack overflow on all stacks Andy Lutomirski
2017-11-23 11:19   ` Borislav Petkov
2017-11-22  4:44 ` [PATCH v2 09/18] x86/asm: Move SYSENTER_stack to the beginning of struct tss_struct Andy Lutomirski
2017-11-23 12:00   ` Borislav Petkov
2017-11-23 13:16   ` Denys Vlasenko
2017-11-23 15:02     ` Andy Lutomirski
2017-11-23 19:30   ` Thomas Gleixner
2017-11-22  4:44 ` [PATCH v2 10/18] x86/asm: Remap the TSS into the cpu entry area Andy Lutomirski
2017-11-23 19:32   ` Thomas Gleixner
2017-11-23 19:55   ` Borislav Petkov
2017-11-23 20:15     ` Andy Lutomirski
2017-11-23 20:37       ` Borislav Petkov
2017-11-24  2:40         ` Andy Lutomirski
2017-11-24  4:17           ` Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 11/18] x86/asm/64: Separate cpu_current_top_of_stack from TSS.sp0 Andy Lutomirski
2017-11-23 19:34   ` Thomas Gleixner
2017-11-22  4:44 ` [PATCH v2 12/18] x86/espfix/64: Stop assuming that pt_regs is on the entry stack Andy Lutomirski
2017-11-23 19:36   ` Thomas Gleixner
2017-11-22  4:44 ` [PATCH v2 13/18] x86/asm/64: Use a percpu trampoline stack for IDT entries Andy Lutomirski
2017-11-23 23:44   ` Thomas Gleixner
2017-11-24  4:14     ` Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 14/18] x86/asm/64: Return to userspace from the trampoline stack Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 15/18] x86/entry/64: Create a percpu SYSCALL entry trampoline Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 16/18] x86/irq: Remove an old outdated comment about context tracking races Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 17/18] x86/irq/64: In the stack overflow warning, print the offending IP Andy Lutomirski
2017-11-22  4:44 ` [PATCH v2 18/18] x86/entry/64: Move the IST stacks into cpu_entry_area Andy Lutomirski
2017-11-22  6:22 ` [PATCH v2 00/18] Entry stack switching Ingo Molnar
2017-11-22  6:36   ` Ingo Molnar
2017-11-22 16:23   ` Andy Lutomirski
2017-11-23  6:21     ` Ingo Molnar
2017-11-23  6:44       ` Ingo Molnar
2017-11-23  6:58         ` Ingo Molnar
2017-11-23 15:29           ` Andy Lutomirski
2017-11-23 16:41             ` Thomas Gleixner
2017-11-22  7:39 ` WARNING: can't dereference registers at ffffc90004dfff60 for ip error_entry+0x7d/0xd0 (Re: [PATCH v2 00/18] Entry stack switching) Ingo Molnar
2017-11-22  7:43   ` Ingo Molnar
2017-11-22 13:55   ` Josh Poimboeuf
2017-11-22 15:19     ` Andy Lutomirski
2017-11-22 15:56       ` Ingo Molnar
2017-11-22 16:35         ` Andy Lutomirski

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