From: Macpaul Lin <macpaul.lin@mediatek.com>
To: Hui-Liu Liu <hui.liu@mediatek.com>, <lee.jones@linaro.org>,
<robh+dt@kernel.org>, <matthias.bgg@gmail.com>,
<lgirdwood@gmail.com>, <broonie@kernel.org>,
<eddie.huang@mediatek.com>, <a.zummo@towertech.it>,
<alexandre.belloni@bootlin.com>, <fshao@chromium.org>
Cc: <srv_heupstream@mediatek.com>, <zhiyong.tao@mediatek.com>,
<hsin-hsiung.wang@mediatek.com>, <sean.wang@mediatek.com>,
<yuchen.huang@mediatek.com>, <wen.su@mediatek.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-rtc@vger.kernel.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Wens Tsai <wenst@chromium.org>,
Fabien Parent <fparent@baylibre.com>,
Rex-BC Chen <Rex-BC.Chen@mediatek.com>
Subject: Re: [PATCH 1/2] arm64: dts: mt8192: add PWRAP node
Date: Thu, 27 Jan 2022 17:32:00 +0800 [thread overview]
Message-ID: <8725f9cb-9c40-2d51-0a7b-96aaf80f7bdf@mediatek.com> (raw)
In-Reply-To: <20220127063145.13413-2-hui.liu@mediatek.com>
On 1/27/22 2:31 PM, Hui-Liu Liu wrote:
> From: Hui Liu <hui.liu@mediatek.com>
>
> Add pwrap node.
>
> Signed-off-by: Hui Liu <hui.liu@mediatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 53d790c335f9..9ef33dbf7a73 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -316,6 +316,18 @@ systimer: timer@10017000 {
> clock-names = "clk13m";
> };
>
> + pwrap: pwrap@10026000 {
> + compatible = "mediatek,mt6873-pwrap";
> + reg = <0 0x10026000 0 0x1000>;
> + reg-names = "pwrap";
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&infracfg CLK_INFRA_PMIC_AP>,
> + <&infracfg CLK_INFRA_PMIC_TMR>;
> + clock-names = "spi", "wrap";
> + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
> + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
> + };
> +
> scp_adsp: clock-controller@10720000 {
> compatible = "mediatek,mt8192-scp_adsp";
> reg = <0 0x10720000 0 0x1000>;
>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Regards,
Macpaul Lin
next prev parent reply other threads:[~2022-01-27 9:32 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-27 6:31 [PATCH 0/2] Add pwrap node for MediaTek MT8192 SoC and mt6359 node for MediaTek PMIC MT6359 Hui-Liu Liu
2022-01-27 6:31 ` [PATCH 1/2] arm64: dts: mt8192: add PWRAP node Hui-Liu Liu
2022-01-27 9:32 ` Macpaul Lin [this message]
2022-01-27 6:31 ` [PATCH 2/2] arm64: dts: mt6359: add PMIC MT6359 related nodes Hui-Liu Liu
2022-01-27 9:33 ` Macpaul Lin
2022-01-27 9:36 ` [PATCH 0/2] Add pwrap node for MediaTek MT8192 SoC and mt6359 node for MediaTek PMIC MT6359 Macpaul Lin
2022-01-30 8:20 ` Macpaul Lin
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