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From: Nam Cao <namcao@linutronix.de>
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To: Jisheng Zhang <jszhang@kernel.org>, Paul Walmsley <pjw@kernel.org>,
 Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>,
 Alexandre Ghiti <alex@ghiti.fr>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/3] riscv: word-at-a-time: improve find_zero()
 without Zbb
In-Reply-To: <20260908235312.8440-3-jszhang@kernel.org>
References: <20260908235312.8440-1-jszhang@kernel.org>
 <20260908235312.8440-3-jszhang@kernel.org>
Date: Tue, 22 Sep 2026 15:50:24 +0200
Message-ID: <87pky5e6ov.fsf@yellow.woof>
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Jisheng Zhang <jszhang@kernel.org> writes:
> Previous commit improved the find_zero() performance for !RISCV_ISA_ZBB.
> What about RISCV_ISA_ZBB=y but the HW doesn't support Zbb? We have the
> same heavy generic fls64() issue.

This patch separation makes sense in your first version. Now it makes
more sense to squash this part to the first patch.

...
> To remove non-necessary zero bits couting on RV32, we also replace the
> 'fls64(mask) >> 3' with '!mask ? 0 : ((__fls(mask) + 1) >> 3);'

This should be its own patch.

Nam