From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Binbin Wu <binbin.wu@linux.intel.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: seanjc@google.com, pbonzini@redhat.com,
dave.hansen@linux.intel.com, andrew.cooper3@citrix.com,
nik.borisov@suse.com, kas@kernel.org, rick.p.edgecombe@intel.com,
chao.gao@intel.com, tony.lindgren@linux.intel.com,
kishen.maloor@intel.com, dedekind1@gmail.com
Subject: Re: [PATCH v4 2/4] KVM: TDX: Report CORE_CAPABILITIES as configurable
Date: Thu, 24 Sep 2026 14:44:01 +0800 [thread overview]
Message-ID: <8c54782e-8c6c-4503-8379-d1ab4a181743@intel.com> (raw)
In-Reply-To: <20260917072548.2314491-3-binbin.wu@linux.intel.com>
On 9/17/2026 3:25 PM, Binbin Wu wrote:
> Add CORE_CAPABILITIES (CPUID.0x7.0.EDX[30]) to KVM's allowlist of TDX
> directly configurable CPUID feature bits, even though KVM doesn't support
> MSR_IA32_CORE_CAPS for TDX guests, to accommodate the legacy TDX module
> definition and userspace's stale knowledge of it.
>
> Older TDX specifications define the CORE_CAPABILITIES CPUID bit as
> fixed-1, so userspace may expect the bit to be enabled for TDs. #VE
> reduction turns it into a directly configurable bit, so leaving it out of
> the allowlist would make the bit impossible to enable once KVM starts
> validating userspace's CPUID input, i.e. would be a surprising behavior
> change for such userspace.
>
> Reporting CORE_CAPABILITIES as directly configurable also lets userspace
> detect that the bit is no longer fixed-1, and thus correct its stale
> knowledge.
>
> Keep MSR_IA32_CORE_CAPS unsupported for TDs, as no existing TDX user needs
> guest access to the MSR.
>
> Note, CORE_CAPABILITIES is the only bit that is unsupported by KVM *and*
> changed from fixed-1 to directly configurable by #VE reduction, and no
> further #VE reductions are expected.
>
> Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com>
> Reviewed-by: Tony Lindgren <tony.lindgren@linux.intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
> ---
> v4:
> - Add #VE reduction related background to the changelog. (Kishen)
> - Add RB from Tony.
>
> v3:
> - Drop the code for MSR_IA32_CORE_CAPS access.
> ---
> arch/x86/kvm/vmx/tdx.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
> index 2b51a85c998e8..b34afc52b714e 100644
> --- a/arch/x86/kvm/vmx/tdx.c
> +++ b/arch/x86/kvm/vmx/tdx.c
> @@ -165,6 +165,13 @@ static void __init tdx_initialize_cpu_cfg_caps(void)
> TDX_CFG_F(AVX512_VP2INTERSECT),
> TDX_CFG_F(SERIALIZE),
> TDX_CFG_F(TSXLDTRK),
> + /*
> + * KVM doesn't support MSR_IA32_CORE_CAPS, but older TDX specs
> + * define this bit as fixed-1. Report it as configurable to
> + * accommodate the legacy TDX module definition, and to let
> + * userspace detect that the bit is no longer fixed-1.
> + */
> + TDX_CFG_EXTRA_F(CORE_CAPABILITIES),
> );
>
> tdx_cpu_cfg_cap_init(CPUID_7_1_EAX,
next prev parent reply other threads:[~2026-09-24 6:44 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 7:25 [PATCH v4 0/4] KVM: TDX: Validate directly configurable CPUID bits Binbin Wu
2026-09-17 7:25 ` [PATCH v4 1/4] KVM: TDX: Track configurable CPUID bits allowed by KVM Binbin Wu
2026-09-23 0:01 ` Edgecombe, Rick P
2026-09-23 0:14 ` Binbin Wu
2026-09-23 0:45 ` Edgecombe, Rick P
2026-09-23 0:57 ` Binbin Wu
2026-09-23 1:09 ` Edgecombe, Rick P
2026-09-23 1:17 ` Binbin Wu
2026-09-23 11:21 ` Xiaoyao Li
2026-09-23 14:25 ` Edgecombe, Rick P
2026-09-24 2:05 ` Xiaoyao Li
2026-09-24 6:36 ` Xiaoyao Li
2026-09-24 7:49 ` Binbin Wu
2026-09-24 9:30 ` Xiaoyao Li
2026-09-24 11:41 ` Binbin Wu
2026-09-24 13:55 ` Xiaoyao Li
2026-09-24 15:10 ` Binbin Wu
2026-09-24 14:33 ` Xiaoyao Li
2026-09-28 8:08 ` Binbin Wu
2026-09-28 23:58 ` Edgecombe, Rick P
2026-09-29 0:19 ` Binbin Wu
2026-09-17 7:25 ` [PATCH v4 2/4] KVM: TDX: Report CORE_CAPABILITIES as configurable Binbin Wu
2026-09-22 21:11 ` Edgecombe, Rick P
2026-09-23 0:03 ` Binbin Wu
2026-09-24 6:44 ` Xiaoyao Li [this message]
2026-09-17 7:25 ` [PATCH v4 3/4] KVM: TDX: Filter configurable CPUID bits Binbin Wu
2026-09-23 0:16 ` Edgecombe, Rick P
2026-09-23 0:28 ` Binbin Wu
2026-09-23 0:34 ` Edgecombe, Rick P
2026-09-17 7:25 ` [PATCH v4 4/4] KVM: TDX: Validate userspace CPUID input for KVM_TDX_INIT_VM Binbin Wu
2026-09-23 0:16 ` Edgecombe, Rick P
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8c54782e-8c6c-4503-8379-d1ab4a181743@intel.com \
--to=xiaoyao.li@intel.com \
--cc=andrew.cooper3@citrix.com \
--cc=binbin.wu@linux.intel.com \
--cc=chao.gao@intel.com \
--cc=dave.hansen@linux.intel.com \
--cc=dedekind1@gmail.com \
--cc=kas@kernel.org \
--cc=kishen.maloor@intel.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=nik.borisov@suse.com \
--cc=pbonzini@redhat.com \
--cc=rick.p.edgecombe@intel.com \
--cc=seanjc@google.com \
--cc=tony.lindgren@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®