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([2620:10d:c090:500::5:f95e]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33e5eabe0b5sm261383eec.1.2026.09.21.12.44.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 12:44:37 -0700 (PDT) Message-ID: <951923920747d8dcba3d56ca8858e106d9c7ba4e.camel@gmail.com> Subject: Re: [PATCH bpf-next v2 03/13] bpf: track low-32 scalar equality across zero-extending movs From: Eduard Zingerman To: Alexei Starovoitov , Vineet Gupta Cc: Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Kumar Kartikeya Dwivedi , Martin KaFai Lau , Song Liu , Yonghong Song , Jiri Olsa , Emil Tsalapatis , Ihor Solodrai , John Fastabend , Shuah Khan , bpf , LKML , "open list:KERNEL SELFTEST FRAMEWORK" Date: Mon, 21 Sep 2026 12:44:34 -0700 In-Reply-To: References: <20260910164635.459558-1-vineet.gupta@linux.dev> <20260910164635.459558-4-vineet.gupta@linux.dev> <4ab75099-0e95-4fee-81da-6f4198e3e6a0@linux.dev> <202c45e2-58ba-4ad5-a234-c90703031f91@linux.dev> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.60.2 (3.60.2-1.fc44) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Mon, 2026-09-21 at 19:27 +0000, Alexei Starovoitov wrote: > On Mon Sep 21, 2026 at 7:10 PM UTC, Eduard Zingerman wrote: > > On Mon, 2026-09-21 at 18:59 +0000, Alexei Starovoitov wrote: > > > On Mon Sep 21, 2026 at 5:28 PM UTC, Eduard Zingerman wrote: > > > > On Wed, 2026-09-16 at 17:30 -0700, Alexei Starovoitov wrote: > > > > > On Wed, Sep 16, 2026 at 5:08=E2=80=AFPM Vineet Gupta wrote: > > > > > >=20 > > > > > > It ended up with full testsuite run parity - after 4 incrementa= l patches. > > > > > > But the pattern of all those patches was adding some predicate = / > > > > > > special-casing to reg->add_const > > > > > >=20 > > > > > > hunk 1 > > > > > >=20 > > > > > > - if (src_reg->add_const) > > > > > > + if (src_reg->add_const && src_reg->delta) > > > > >=20 > > > > > why? It should not. > > > > > My point is that zero is not special. > > > > > It should be handled within the current framework. > > > > > All these extra hunks are not correct. > > > > > ADD_CONST_32 logic should work for delta =3D=3D 0 just like > > > > > it works for delta =3D=3D 1. > > > >=20 > > > > After thinking about it some more, I agree that having an orthogona= l > > > > encoding would be nice. However, it appears that the split should b= e > > > > somewhat different: > > > >=20 > > > > struct bpf_reg_state { > > > > ... > > > > s32 delta; > > > > u32 id; > > > > enum id_link_kind { full, zext, sext } link_kind; > > > > ... > > > > } > > > >=20 > > > > Where: > > > > - id =3D=3D 0 =3D> no id link > > > > - full =3D> all 64-bits of the register are identical to > > > > all 64-bits of a scalar value `id' (let's call it X). > > > > =E2=88=80 rA{.id =3D=3D X, .link =3D=3D full}, rB{X,full}= =3D> rA =3D=3D rB > > > > - zext =3D> lower 32-bits of the register are identical to > > > > lower 32-bits of a scalar value X, > > > > upper 32-bits of the register are null. > > > > =E2=88=80 rA{.id =3D=3D X, .link =3D=3D ?}, rB{X,zext} = =3D> rA % 32 =3D=3D rB % 32 > > > > - sext =3D> lower 32-bits of the register are identical to > > > > lower 32-bits of a scalar value X, > > > > upper 32-bits of the register are either 0 or 1, > > > > depending on the bit 31 value. > > > > =E2=88=80 rA{.id =3D=3D X, .link =3D=3D ?}, rB{X,sext} = =3D> sext(rA % 32) =3D=3D sext(rB % 32) > > >=20 > > > hmm. > > > there is also 32-bit link with delta, right? > >=20 > > My point is that delta is independent of 32-bit/64-bit property. > > `delta' can be used to propagate in both directions: > > - full 64 bit -> 32 bit sign/zero-extened > > - 32 bit sign/zero-extened -> full 64-bit >=20 > both? how ? > I was under impression that in 32-bit domain delta is one way. > rX =3D ... > wY =3D wX > wY +=3D 5 >=20 > if wY =3D=3D 10 > We cannot do -5 to rX Why? It is still valid to transfer r32 and tnum_subreg knowledge from wY to rX. wY + 5 =3D=3D rX % 32 + 5 =3D> hence rX % 32 knowledge can be recovered. If rX itself had some delta, e.g.: rX =3D ... rX +=3D 7 wY =3D wX wY +=3D 5 Then it would still be possible: wY + 5 =3D=3D (rX - 7) % 32 + 5 =3D rX % 32 - 2. Again, in case of this direction, only lower 32-bits of the 'full' register can be inferred. > and we cannot use your above 'full' encoding for wY +=3D 5. > Currently we use BPF_ADD_CONST32 for wY +=3D 5 > I don't see how 'full' can work.