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[209.85.216.42]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cc4554b5642sm922787a12.32.2026.09.04.07.48.49 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Sep 2026 07:48:49 -0700 (PDT) Received: by mail-pj1-f42.google.com with SMTP id 98e67ed59e1d1-3964e480f76so1218334a91.1 for ; Fri, 04 Sep 2026 07:48:49 -0700 (PDT) X-Forwarded-Encrypted: i=1; AKwUvBy4EmFIv7333p0ai42osD7MitCh0eX8lHaQL2Bf0dZewZcX0K3UEspdcZuPKcqXFtXO5n/RWhUM9Jfhhpk=@vger.kernel.org X-Received: by 2002:a05:6102:2d04:b0:785:eb33:87a8 with SMTP id ada2fe7eead31-78a4a883885mr1900429137.4.1788532960799; Fri, 04 Sep 2026 07:42:40 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <2cf42d7ef9b452efbab3007ec2c2340cf87adbbf.1788338320.git.geert+renesas@glider.be> <20260904-fabulous-lionfish-of-cookies-0d614c@sudeepholla> In-Reply-To: <20260904-fabulous-lionfish-of-cookies-0d614c@sudeepholla> From: Geert Uytterhoeven Date: Fri, 4 Sep 2026 16:42:29 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AcwNN1WAkp69Or55f6uh4v6WhdtMEG7Qz9QclhM1mQOZ0FBl4cYNnC9KwnYi2zM Message-ID: Subject: Re: [PATCH v3 01/12] dt-bindings: clock: renesas,r8a78000-cpg: Add renesas,scmi-firmware property To: Sudeep Holla Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd , Brian Masney , Jerome Brunet , Cristian Marussi , Saravana Kannan , Ulf Hansson , Philipp Zabel , "Rafael J . Wysocki" , Marek Vasut , Bartosz Golaszewski , Konrad Dybcio , Kevin Hilman , Vinod Koul , Wolfram Sang , Kuninori Morimoto , =?UTF-8?Q?Cl=C3=A9ment_Le_Goffic?= , devicetree@vger.kernel.org, arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Hi Sudeep, On Fri, 4 Sept 2026 at 16:03, Sudeep Holla wrote: > On Wed, Sep 02, 2026 at 01:29:17PM +0200, Geert Uytterhoeven wrote: > > On systems using the ARM System Control and Management Interface (SCMI), > > the Clock Pulse Generator hardware registers must not be accessed > > directly. Instead, the SCMI message protocol must be used for inquiry, > > configuration, and control of clocks. > > Why is this node needed in the devicetree at all or why is it not disabled > so that any driver in the OSPM is not probed at all. The node is needed so the corresponding driver can bind against it. The driver takes care of remapping DT hardware descriptions to the abstractions offered by the SCMI firmware when SCMI must be used. > > Add a "renesas,scmi-firmware" property to distinguish between systems > > with and without SCMI, and to indicate which SCMI firmware interface > > provider to communicate with. > > > > I still don't see the need for this if you disable the node, so still The node is not disabled. > NACK. Sorry if I have missed some discussions, please present the information > as part of this patch in the commit log if not the actual binding itself. That's why we have cover letter, with links to previous versions and discussions. Thanks! Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds