From: "Ondřej Jirman" <megous@megous.com>
To: Michal Suchanek <hramrach@gmail.com>
Cc: "Jean-Francois Moine" <moinejf@free.fr>,
"Maxime Ripard" <maxime.ripard@free-electrons.com>,
"Mark Rutland" <mark.rutland@arm.com>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, dev <dev@linux-sunxi.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@codeaurora.org>,
"open list" <linux-kernel@vger.kernel.org>,
"Emilio López" <emilio@elopez.com.ar>,
"Chen-Yu Tsai" <wens@csie.org>,
"Rob Herring" <robh+dt@kernel.org>,
"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [linux-sunxi] Re: [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method
Date: Fri, 15 Jul 2016 18:33:45 +0200 [thread overview]
Message-ID: <abf2f8c1-adb6-ed75-5958-324bb4b4e1e1@megous.com> (raw)
In-Reply-To: <CAOMqctTds7adsfvehfv8wcxbb0NOpEQE5wRff6NwfPOUa3SbRw@mail.gmail.com>
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On 15.7.2016 16:22, Michal Suchanek wrote:
> Hello,
>
> On 15 July 2016 at 15:48, Ondřej Jirman <megous@megous.com> wrote:
>>
>>
>> On 15.7.2016 15:27, Jean-Francois Moine wrote:
>>> On Fri, 15 Jul 2016 12:38:54 +0200
>>> Ondřej Jirman <megous@megous.com> wrote:
>>>
>>>>> If so, then yes, trying to switch to the 24MHz oscillator before
>>>>> applying the factors, and then switching back when the PLL is stable
>>>>> would be a nice solution.
>>>>>
>>>>> I just checked, and all the SoCs we've had so far have that
>>>>> possibility, so if it works, for now, I'd like to stick to that.
>>>>
>>>> It would need to be tested. U-boot does the change only once, while the
>>>> kernel would be doing it all the time and between various frequencies
>>>> and PLL settings. So the issues may show up with this solution too.
>>>
>>> I don't think this is a good idea: the CPU clock may be changed at any
>>> time with the CPUFreq governor. I don't see the system moving from
>>> 1008MHz to 24MHz and then to 1200MHz when some computation is needed!
>>
>> PLL lock time is around 10-20us, I'd guess based on the number of loops
>> in the PLL lock wait loop. So unless you'll be switching frequencies
>> many times per second, this should be barely noticeable.
>>
>> But I'd like a different solution too.
>
> Do you have a patch to test this?
>
> For me changing CPU frequency on Orange Pi One always locks up the
> system. I keep running it on the u-boot setup 1.08GHz at 1.1V
Not anymore. But it's quite simple to hack it into the
drivers/clk/sunxi/clk-factors.c:clk_factors_set_rate()
You can look at u-boot arch/arm/mach-sunxi/clock_sun6i.c:clock_set_pll1
for how to change the CPU clock source.
> Thanks
>
> Michal
>
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next prev parent reply other threads:[~2016-07-15 16:33 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20160625034511.7966-1-megous@megous.com>
2016-06-25 3:44 ` [PATCH v2 01/14] ARM: clk: sunxi: Add driver for the H3 THS clock megous
2016-06-25 7:13 ` Maxime Ripard
2016-06-25 15:23 ` Ondřej Jirman
2016-06-28 11:52 ` Maxime Ripard
2016-06-25 3:44 ` [PATCH v2 02/14] thermal: sun8i_ths: Add support for the thermal sensor on Allwinner H3 megous
2016-06-25 7:10 ` Maxime Ripard
2016-06-25 15:12 ` Ondřej Jirman
2016-06-28 11:39 ` Maxime Ripard
2016-06-25 3:45 ` [PATCH v2 03/14] dt-bindings: document sun8i_ths - H3 thermal sensor driver megous
2016-06-28 20:56 ` Rob Herring
2016-06-25 3:45 ` [PATCH v2 04/14] regulator: SY8106A regulator driver megous
2016-06-26 11:26 ` Mark Brown
2016-06-26 15:07 ` Ondřej Jirman
2016-06-27 14:54 ` Mark Brown
2016-06-28 16:27 ` Ondřej Jirman
2016-06-27 15:10 ` Mark Brown
2016-06-25 3:45 ` [PATCH v2 05/14] dt-bindings: document " megous
2016-06-26 11:27 ` Mark Brown
2016-06-26 15:10 ` Ondřej Jirman
2016-06-26 18:52 ` Mark Brown
2016-06-25 3:45 ` [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method megous
2016-06-30 20:40 ` Maxime Ripard
2016-07-01 0:50 ` Ondřej Jirman
2016-07-01 5:37 ` Jean-Francois Moine
2016-07-01 6:34 ` Ondřej Jirman
2016-07-01 7:47 ` Jean-Francois Moine
2016-07-15 8:53 ` Maxime Ripard
2016-07-15 10:38 ` Ondřej Jirman
2016-07-15 13:27 ` Jean-Francois Moine
2016-07-15 13:48 ` Ondřej Jirman
2016-07-15 14:22 ` [linux-sunxi] " Michal Suchanek
2016-07-15 16:33 ` Ondřej Jirman [this message]
2016-07-21 9:51 ` Maxime Ripard
2016-07-21 9:48 ` Maxime Ripard
2016-07-21 9:52 ` Ondřej Jirman
2016-07-26 6:32 ` Maxime Ripard
2016-07-28 11:27 ` Changed: sunxi-ng clock code - NKMP clock implementation is wrong Ondřej Jirman
2016-07-28 11:38 ` [linux-sunxi] " Chen-Yu Tsai
2016-07-28 21:00 ` Maxime Ripard
2016-07-28 22:01 ` Ondřej Jirman
2016-07-31 10:31 ` Maxime Ripard
2016-07-31 22:01 ` Ondřej Jirman
2016-08-31 20:25 ` Maxime Ripard
2016-07-01 0:53 ` [PATCH v2 06/14] ARM: sun8i: clk: Add clk-factor rate application method Ondřej Jirman
2016-07-15 8:19 ` Maxime Ripard
2016-06-25 3:45 ` [PATCH v2 07/14] ARM: dts: sun8i: Use sun8i-h3-pll1-clk for pll1 in H3 megous
2016-06-25 3:45 ` [PATCH v2 08/14] ARM: dts: sun8i: Add thermal sensor node to the sun8i-h3.dtsi megous
2016-06-25 3:45 ` [PATCH v2 09/14] ARM: dts: sun8i: Add cpu0 label to sun8i-h3.dtsi megous
2016-06-25 3:45 ` [PATCH v2 10/14] ARM: dts: sun8i: Add r_twi I2C controller megous
2016-06-25 7:16 ` Maxime Ripard
2016-06-25 3:45 ` [PATCH v2 11/14] ARM: dts: sun8i: Add sy8106a regulator to Orange Pi PC megous
2016-06-25 3:45 ` [PATCH v2 12/14] ARM: dts: sun8i: Setup CPU operating points for Onrage PI PC megous
2016-06-25 3:45 ` [PATCH v2 13/14] ARM: dts: sun8i: Add gpio-regulator used on Orange Pi One megous
2016-06-25 7:18 ` Maxime Ripard
2016-06-25 3:45 ` [PATCH v2 14/14] ARM: dts: sun8i: Enable DVFS " megous
2016-06-30 11:13 ` [linux-sunxi] " Michal Suchanek
2016-06-30 14:19 ` Ondřej Jirman
2016-06-30 15:16 ` Michal Suchanek
2016-06-30 15:32 ` Ondřej Jirman
2016-06-30 15:50 ` Michal Suchanek
2016-06-30 15:53 ` Ondřej Jirman
2016-07-01 10:54 ` Michal Suchanek
2016-06-30 14:23 ` Siarhei Siamashka
2016-07-01 1:17 ` Ondřej Jirman
2016-07-22 0:41 ` Ondřej Jirman
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