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Tue, 06 Oct 2026 23:12:47 -0700 (PDT) X-Received: by 2002:a17:902:d54f:b0:2e6:1715:e4a6 with SMTP id d9443c01a7336-2e61715e821mr2275455ad.38.1791353567290; Tue, 06 Oct 2026 23:12:47 -0700 (PDT) Received: from [10.204.78.119] ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2e6046fe0e8sm5326635ad.25.2026.10.06.23.12.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 06 Oct 2026 23:12:46 -0700 (PDT) Message-ID: Date: Wed, 7 Oct 2026 11:42:37 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 07/17] phy: qcom: edp: Add Nord-specific register offsets To: Dmitry Baryshkov Cc: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Kuogee Hsieh , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Ritesh Kumar , Mahadevan P References: <20260911-nord-drv-dt-v1-0-e25c073cf1b6@oss.qualcomm.com> <20260911-nord-drv-dt-v1-7-e25c073cf1b6@oss.qualcomm.com> Content-Language: en-GB From: Nabige Aala In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA3MDAyNCBTYWx0ZWRfXzfcELEQMtKha IVAcoV7bODgRuqp2K+NNNCSdqP60azxluFvLNvzfePRwluqugNbLVgx80Y0VA9cjC2fdlxgbASa QeshiC/wVo1LR3O/vSAmtnqMxw13xEU= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA3MDAyNCBTYWx0ZWRfX+ZorYL3wPrTf ggKo+xRJajgUdIs9QbkKX+9ciUTFst8yaNy4+cef+MhIw2UXBH4mVciKy2iWJ9cr0lZROMIk+D2 T6yuQwNXkpcBjPn/at+NjATAHIbSsMChG0WyVp4mROa/qy1OljKwb9WdoNEckI6Mb+gyvpYcQUL /eyT1FeEe8Zgfjz3cl2v0zzi9hhRkcF9Xei8F2inFWToPJzMuX48JdrtIaGHYAf8DAiw0z2mLuq e23MVrkmuHSgO2DMqNcrBSTJgXMuTj57sQZjg7pdf7lcE/qNyNZqFx48cxOUA58AH+CQCBaXNUr FoeeQTsn1hr2MkX287Ii+EFqnL3wQSjeMS/W8bzQ7FZ8UMW6xdkqGC4SpnO93zem9Dbnntt7SDk Zs70qJVTKX9QMEurNMt31FTjmPs/tUxubs/zjIm1ZiQOEf2XEKkzvINadUuVKgky3q98UQzkjdq o2JR4jxwFO3nui5WLfw== X-Proofpoint-GUID: PhG36svVv9dx2uO3-UOCzWo69EeU9gJY X-Proofpoint-ORIG-GUID: PhG36svVv9dx2uO3-UOCzWo69EeU9gJY X-Authority-Analysis: v=2.4 cv=LvYHWXdc c=1 sm=1 tr=0 ts=6ac5e2e0 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=ws4HDfdl8TRdMr_wlFsA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-07_02,2026-10-06_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 adultscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610070024 On 9/14/2026 5:28 AM, Dmitry Baryshkov wrote: > On Fri, Sep 11, 2026 at 09:06:38PM +0530, Nabige Aala wrote: >> From: Ritesh Kumar >> >> Nord relocates several DP PHY and QSERDES v8 COM registers relative >> to existing SoCs. Add Nord-specific defines for the relocated and >> new-only registers in phy-qcom-qmp-qserdes-dp-com-v8.h and >> phy-qcom-edp.c so Nord sequences can reference them by name. > If the registers are reallocated it usually means that there are other > registers being inserted (or deleted). Are those the only registers > being changed? Yes, only few register offset is changed that is taken care in this change. >> Signed-off-by: Ritesh Kumar >> Signed-off-by: Nabige Aala >> --- >> drivers/phy/qualcomm/phy-qcom-edp.c | 10 ++++++++++ >> drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h | 3 +++ >> 2 files changed, 13 insertions(+) >> >> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c >> index a3c893f72908..bf8a17336c7e 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-edp.c >> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c >> @@ -41,9 +41,19 @@ >> >> #define DP_PHY_VCO_DIV 0x0074 >> #define DP_PHY_TX0_TX1_LANE_CTL 0x007c >> +/* Nord uses a different register layout; non-Nord value is 0x00a0 */ >> #define DP_PHY_TX2_TX3_LANE_CTL 0x00a0 >> +#define DP_PHY_TX2_TX3_LANE_CTL_NORD 0x00c0 >> >> +/* Nord uses a different register layout; non-Nord value is 0x00e0 */ >> #define DP_PHY_STATUS 0x00e0 >> +#define DP_PHY_STATUS_NORD 0x0110 >> +#define DP_PHY_LDO_CFG 0x00f0 > Why does it not have a _NORD suffix? Ack, I will add  _NORD suffix in the next revision. Thanks > >> + >> +/* Nord-specific TX lane registers */ >> +#define DP_PHY_TX_LN0_DRV_LVL_NORD 0x00e4 >> +#define DP_PHY_TX_LN1_DRV_LVL_NORD 0x00e8 >> +#define TXn_TX_BAND_NORD 0x0024 >> >> /* LANE_TXn registers */ >> #define TXn_CLKBUF_ENABLE 0x0000 >> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h >> index 93edabb830af..008b17222a8d 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h >> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-dp-com-v8.h >> @@ -48,5 +48,8 @@ >> #define DP_QSERDES_V8_COM_CLK_FWD_CONFIG_1 0x2f4 >> #define DP_QSERDES_V8_COM_CMN_STATUS 0x314 >> #define DP_QSERDES_V8_COM_C_READY_STATUS 0x33c >> +#define DP_QSERDES_V8_COM_SVS_MODE_CLK_SEL_NORD 0x17c >> +#define DP_QSERDES_V8_COM_CMN_STATUS_NORD 0x1d0 >> +#define DP_QSERDES_V8_COM_C_READY_STATUS_NORD 0x1f8 >> >> #endif >> >> -- >> 2.34.1 >>