From: Andi Shyti <andi.shyti@kernel.org>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>
Cc: Robert Foss <rfoss@kernel.org>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/5] i2c: qcom-cci: Factor out write command queue programming
Date: Tue, 6 Oct 2026 11:24:18 +0200 [thread overview]
Message-ID: <asS9_rTnD43_p0HG@zenone.zhora.eu> (raw)
In-Reply-To: <20261004-cci-imp-v1-1-227d12cb4829@oss.qualcomm.com>
Hi Loic,
the patch looks good.
> static int cci_i2c_write(struct cci *cci, u16 master,
> u16 addr, u8 *buf, u16 len)
> {
> - u8 queue = QUEUE_0;
> - u8 load[12] = { 0 };
> - int i = 0, j, ret;
> + void __iomem *loadq = cci->base + CCI_I2C_Mm_Qn_LOAD_DATA(master, QUEUE_0);
I'm not a big fan of "heavy" assignments during declaration, but
no need to resend just for this.
Andi
next prev parent reply other threads:[~2026-10-06 9:24 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-04 19:09 [PATCH 0/5] i2c: qcom-cci: Runtime capability detection and improved read/write Loic Poulain
2026-10-04 19:09 ` [PATCH 1/5] i2c: qcom-cci: Factor out write command queue programming Loic Poulain
2026-10-06 9:24 ` Andi Shyti [this message]
2026-10-04 19:09 ` [PATCH 2/5] i2c: qcom-cci: Handle and report queue overflow/underflow interrupts Loic Poulain
2026-10-06 9:28 ` Andi Shyti
2026-10-04 19:09 ` [PATCH 3/5] i2c: qcom-cci: Detect capabilities from CCI_HW_VERSION at runtime Loic Poulain
2026-10-06 9:34 ` Andi Shyti
2026-10-04 19:09 ` [PATCH 4/5] i2c: qcom-cci: Add burst write support Loic Poulain
2026-10-04 19:09 ` [PATCH 5/5] i2c: qcom-cci: Extend i2c read limits based on CCI revision Loic Poulain
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