From: Karl Mehltretter <kmehltretter@gmail.com>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: fix load_unaligned_zeropad() fixup for RV32
Date: Wed, 7 Oct 2026 08:27:34 +0200 [thread overview]
Message-ID: <asXlyzkNoALogots@gmail.com> (raw)
In-Reply-To: <ap-CqOtyN9qvWHOb@xhacker>
On Tue, Sep 08, 2026 at 11:36:08AM +0100, Jisheng Zhang wrote:
> > Fixes: d0fdc20b0429 ("riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HW")
> > Cc: stable@vger.kernel.org
> > Assisted-by: LLM
> > Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com>
>
> Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
>
Friendly ping. Is anything else needed?
Thanks,
Karl
next prev parent reply other threads:[~2026-10-07 6:27 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-07 19:07 Karl Mehltretter
2026-09-08 3:36 ` Jisheng Zhang
2026-10-07 6:27 ` Karl Mehltretter [this message]
2026-10-08 2:40 ` patchwork-bot+linux-riscv
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