From: Chen Yu <yu.c.chen@intel.com>
To: tony.luck@intel.com, reinette.chatre@intel.com
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, tglx@kernel.org,
bp@alien8.de, mingo@redhat.com, dave.hansen@linux.intel.com,
hpa@zytor.com, fenghuay@nvidia.com, babu.moger@amd.com,
anil.keshavamurthy@broadcom.com, chen.yu@linux.dev,
Hongyu Ning <hongyu.ning@linux.intel.com>,
Chen Yu <yu.c.chen@intel.com>
Subject: [PATCH v5 08/10] fs/resctrl: Do not invoke smp_processor_id() in preemptible context
Date: Wed, 1 Jul 2026 21:47:04 +0800 [thread overview]
Message-ID: <cd5e7dbc58230498e5c31e362a0e4110924b8fef.1782866200.git.yu.c.chen@intel.com> (raw)
In-Reply-To: <cover.1782866200.git.yu.c.chen@intel.com>
From: Tony Luck <tony.luck@intel.com>
Currently, mon_evt::any_cpu is false for all events associated with
RDT_RESOURCE_L3. The MMIO-based CMT will set any_cpu to true in a
follow-up patch. This change will trigger a warning when calling
smp_processor_id() inside __l3_mon_event_count(), because
__l3_mon_event_count() may be invoked from arbitrary CPUs in task
context. Since the calling context is preemptible here,
smp_processor_id() will emit a debug warning.
To prepare for MMIO-based CMT reads, skip the current CPU lookup
when an event's any_cpu flag is set. Events with this flag do not
require execution on a specific CPU.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Tested-by: Hongyu Ning <hongyu.ning@linux.intel.com>
Signed-off-by: Chen Yu <yu.c.chen@intel.com>
---
v4->v5:
No change.
---
fs/resctrl/monitor.c | 42 ++++++++++++++++++++++++++++++++----------
1 file changed, 32 insertions(+), 10 deletions(-)
diff --git a/fs/resctrl/monitor.c b/fs/resctrl/monitor.c
index 0e6a389a16bf..6a7c86a72c51 100644
--- a/fs/resctrl/monitor.c
+++ b/fs/resctrl/monitor.c
@@ -417,9 +417,37 @@ static void mbm_cntr_free(struct rdt_l3_mon_domain *d, int cntr_id)
memset(&d->cntr_cfg[cntr_id], 0, sizeof(*d->cntr_cfg));
}
+/**
+ * cpu_on_correct_domain() - Check if current CPU is in the correct
+ * domain for the event.
+ * @rr: The rmid_read structure containing event and domain information.
+ *
+ * Context: Preemptible process context when @rr->evt->any_cpu is set.
+ * Non-migratable process context (via smp_call_on_cpu()) or
+ * non-preemptible context (via smp_call_function_any()) when
+ * the event must be read on a specific CPU.
+ * Return: true if the current CPU can read this event, false otherwise.
+ */
+static bool cpu_on_correct_domain(struct rmid_read *rr)
+{
+ int cpu;
+
+ /* Any CPU is OK for this event */
+ if (rr->evt->any_cpu)
+ return true;
+
+ cpu = smp_processor_id();
+
+ /* Single domain. Must be on a CPU in that domain. */
+ if (rr->hdr)
+ return cpumask_test_cpu(cpu, &rr->hdr->cpu_mask);
+
+ /* Summing domains that share a cache, must be on a CPU for that cache. */
+ return cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map);
+}
+
static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr)
{
- int cpu = smp_processor_id();
u32 closid = rdtgrp->closid;
u32 rmid = rdtgrp->mon.rmid;
struct rdt_l3_mon_domain *d;
@@ -452,9 +480,6 @@ static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr)
return 0;
}
- /* Reading a single domain, must be on a CPU in that domain. */
- if (!cpumask_test_cpu(cpu, &d->hdr.cpu_mask))
- return -EINVAL;
if (rr->is_mbm_cntr)
rr->err = resctrl_arch_cntr_read(rr->r, d, closid, rmid, cntr_id,
rr->evt->evtid, &tval);
@@ -472,7 +497,6 @@ static int __l3_mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr)
static int __l3_mon_event_count_sum(struct rdtgroup *rdtgrp, struct rmid_read *rr)
{
- int cpu = smp_processor_id();
u32 closid = rdtgrp->closid;
u32 rmid = rdtgrp->mon.rmid;
struct rdt_l3_mon_domain *d;
@@ -490,10 +514,6 @@ static int __l3_mon_event_count_sum(struct rdtgroup *rdtgrp, struct rmid_read *r
return -EINVAL;
}
- /* Summing domains that share a cache, must be on a CPU for that cache. */
- if (!cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map))
- return -EINVAL;
-
/*
* Legacy files must report the sum of an event across all
* domains that share the same L3 cache instance.
@@ -524,7 +544,9 @@ static int __mon_event_count(struct rdtgroup *rdtgrp, struct rmid_read *rr)
{
switch (rr->r->rid) {
case RDT_RESOURCE_L3:
- WARN_ON_ONCE(rr->evt->any_cpu);
+ if (!cpu_on_correct_domain(rr))
+ return -EINVAL;
+
if (rr->hdr)
return __l3_mon_event_count(rdtgrp, rr);
else
--
2.45.2
next prev parent reply other threads:[~2026-07-01 13:57 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 13:44 [PATCH v5 00/10] Introduce MMIO-based CMT access for Enhanced RDT Chen Yu
2026-07-01 13:45 ` [PATCH v5 01/10] x86/resctrl: Require 64-bit x86 for resctrl support Chen Yu
2026-07-01 13:45 ` [PATCH v5 02/10] x86/topology: Export topo_lookup_cpuid() for resctrl use Chen Yu
2026-07-10 23:35 ` Reinette Chatre
2026-07-14 15:45 ` Chen, Yu C
2026-07-01 13:45 ` [PATCH v5 03/10] x86/resctrl: Parse ACPI ERDT table and save CACD cpumask for RMDD domains Chen Yu
2026-07-10 23:42 ` Reinette Chatre
2026-07-14 15:19 ` Chen, Yu C
2026-07-14 16:13 ` Reinette Chatre
2026-07-14 16:33 ` Chen, Yu C
2026-07-01 13:45 ` [PATCH v5 04/10] x86/resctrl: Attach ACPI ERDT information to L3 mon domain on CPU online Chen Yu
2026-07-10 23:45 ` Reinette Chatre
2026-07-14 8:51 ` Chen, Yu C
2026-07-14 16:13 ` Reinette Chatre
2026-07-14 16:24 ` Chen, Yu C
2026-07-01 13:46 ` [PATCH v5 05/10] x86/resctrl: Parse ACPI CMRC table Chen Yu
2026-07-10 23:46 ` Reinette Chatre
2026-07-14 16:27 ` Chen, Yu C
2026-07-01 13:46 ` [PATCH v5 06/10] x86/resctrl: Replace "msr" in monitoring data identifiers Chen Yu
2026-07-10 23:47 ` Reinette Chatre
2026-07-01 13:46 ` [PATCH v5 07/10] x86/resctrl: Refactor the monitor read function Chen Yu
2026-07-01 13:47 ` Chen Yu [this message]
2026-07-10 23:48 ` [PATCH v5 08/10] fs/resctrl: Do not invoke smp_processor_id() in preemptible context Reinette Chatre
2026-07-01 13:47 ` [PATCH v5 09/10] x86/resctrl: Introduce helpers to read L3 occupancy via MMIO Chen Yu
2026-07-10 23:53 ` Reinette Chatre
2026-07-01 13:47 ` [PATCH v5 10/10] x86/resctrl: Enable " Chen Yu
2026-07-10 23:55 ` Reinette Chatre
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