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Mon, 21 Sep 2026 05:06:19 -0700 (PDT) Received: from oss.qualcomm.com ([86.121.170.232]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48724583250sm22170562f8f.22.2026.09.21.05.06.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 05:06:18 -0700 (PDT) Date: Mon, 21 Sep 2026 15:06:16 +0300 From: Abel Vesa To: Kathiravan Thirumoorthy Cc: Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Georgi Djakov , Konrad Dybcio , Varadarajan Narayanan , Dmitry Baryshkov , Abel Vesa , Gokul Sriram Palanisamy , Sricharan Ramabadhran , Kathiravan T , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Konrad Dybcio Subject: Re: [PATCH 09/11] arm64: dts: qcom: ipq5424: Wire up PPE clock to GCC Message-ID: References: <20260921-ipq_clk_changes-v1-0-d242e3d49648@oss.qualcomm.com> <20260921-ipq_clk_changes-v1-9-d242e3d49648@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260921-ipq_clk_changes-v1-9-d242e3d49648@oss.qualcomm.com> X-Proofpoint-ORIG-GUID: t5usxdYOxJoKQGDutc7htniXsodpce4f X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDE3NSBTYWx0ZWRfXwuXNU9c01yKw kTpupLITiJoAXu5Nn1QQfcD04GQ0YG8A5WeaKJV8pzm0n695GtdW30O4A8fXY1I7NjaENtmL3ld SJ2VOscM/b3u7XXks+EUAwvvTMujZzA= X-Proofpoint-GUID: t5usxdYOxJoKQGDutc7htniXsodpce4f X-Authority-Analysis: v=2.4 cv=Ht7jiETS c=1 sm=1 tr=0 ts=6ab11dbc cx=c_pps a=wuOIiItHwq1biOnFUQQHKA==:117 a=po8fGBi+ks8MzcVQGuqtFQ==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=Ue0VUxZ6JbCSWW521nUA:9 a=CjuIK1q_8ugA:10 a=XD7yVLdPMpWraOa8Un9W:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDE3NSBTYWx0ZWRfX0xapXKAVxSpJ Ygbs+0Ib+05tC0ZBrTwPyeqZNqoOhxgKso3/kH/L0vOt25UsIQ2gWvwHA3TU2lB/YcVVRVlRXdw cI3+rnbJRX46hoggkkI8FagMTjLNWs7y2D7GSoflixIvFK3H4bbSGrUxaF50Mgx2g7VqEFPpqXx RXK3VkRfYoiMTQu06xpoSMMEO3I4vZeVLrzreLnjkZuQ9Aa4XZ5Wth8TY16RRJpQXepYLZG5B4+ xex+BMGTGePm19EYQRRV13p+ZNGvhOP+qDWNnYoJC39r6iwo1a8INHudlXlYznm3NxgKCiMr3Jr /S6ZxiU7RgIORgM/b88jFeCzN3pGTWIikmydchULF3D0MX+snht3vF2bUd9igpZ3s9mQD+apAuL lC4ZsyziBuTxkCAaiC4HHIZ7ylqWc0Tc6eTRWmRzU1A8RnlWNBiONj+RW6vb90wXi4P66eu1Fb3 bxxhiK2yBkKeJ+FwVrA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_04,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 spamscore=0 adultscore=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210175 On 26-09-21 11:49:42, Kathiravan Thirumoorthy wrote: > Add the PPE 375 MHz clock generated by the CMN PLL to the GCC clock > controller inputs. GCC uses this clock as the source for the NSS > MEMNOC clocks. > > Reviewed-by: Konrad Dybcio > Signed-off-by: Kathiravan Thirumoorthy Reviewed-by: Abel Vesa