From: linux-kernel-dev@aliel.fr
To: Conor Dooley <conor@kernel.org>
Cc: "Uwe Kleine-König" <ukleinek@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Kevin Hilman" <khilman@baylibre.com>,
"Jerome Brunet" <jbrunet@baylibre.com>,
"Martin Blumenstingl" <martin.blumenstingl@googlemail.com>,
linux-pwm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-amlogic@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: pwm: amlogic: Add core clock for T7
Date: Fri, 25 Sep 2026 16:32:15 +0200 [thread overview]
Message-ID: <ab7ddd32-47eb-47d1-b317-94ee190362a3@aliel.fr> (raw)
In-Reply-To: <20260924-reprimand-taste-3481319d9e31@spud>
On 9/24/26 6:35 PM, Conor Dooley wrote:
> On Thu, Sep 24, 2026 at 05:14:28PM +0200, Ronald Claveau via B4 Relay wrote:
>> From: Ronald Claveau <linux-kernel-dev@aliel.fr>
>>
>> The T7 PWM controller has a system clock (the register access clock)
>> in addition to the two input clocks of channels A and B. Add it as a
>> third clock, named "core", for the amlogic,t7-pwm compatible, and
>> require clock-names for this SoC for clarity.
>
> What additional clarity does that actually bring? I think it's kinda
> less clear, because the git history is required to explain why drivers
> cannot fetch the existing clocks by name.
>
Right it's not clear, I will rephrase this.
>>
>> The other compatibles are left unchanged. Add an example showing the
>> T7 usage with its fallback to amlogic,meson-s4-pwm.
>>
>> Signed-off-by: Ronald Claveau <linux-kernel-dev@aliel.fr>
>> ---
>> .../devicetree/bindings/pwm/pwm-amlogic.yaml | 37 +++++++++++++++++++---
>> 1 file changed, 33 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
>> index c337d85da40f1..9212a40d9fe48 100644
>> --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
>> +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml
>> @@ -62,7 +62,7 @@ properties:
>>
>> clock-names:
>> minItems: 1
>> - maxItems: 2
>> + maxItems: 3
>>
>> power-domains:
>> maxItems: 1
>> @@ -135,17 +135,38 @@ allOf:
>> properties:
>> compatible:
>> contains:
>> - enum:
>> - - amlogic,meson-s4-pwm
>> + const: amlogic,t7-pwm
>> then:
>> properties:
>> clocks:
>> items:
>> - description: input clock of PWM channel A
>> - description: input clock of PWM channel B
>> - clock-names: false
>> + - description: gate clock for the PWM controller
>> + clock-names:
>> + items:
>> + - const: clk_a
>> + - const: clk_b
>
> I'd rather "channel-a" or similar, we try not to state the obvious in
> the names of clocks etc - of course this is a clock!
>
Thanks for the suggestion, I didn't want to add "clk_chan_a", I will go
with "channel-a" and "channel-b".
>> + - const: core
>> required:
>> - clocks
>> + - clock-names
>> + else:
>> + if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - amlogic,meson-s4-pwm
>> + then:
>> + properties:
>> + clocks:
>> + items:
>> + - description: input clock of PWM channel A
>> + - description: input clock of PWM channel B
>> + clock-names: false
>
> Are you sure that the s4-pwm doesn't also have this core clock? Seems
> likely, no?
>
You right, S4, A1, C3 and T7 have this clock, but S4 and A1 clock driver
declare them with "CLK_IGNORE_UNUSED" flag.
I will make a new proposal on V2.
> Cheers,
> Conor.
>
>> + required:
>> + - clocks
>>
>> - if:
>> properties:
>> @@ -182,3 +203,11 @@ examples:
>> clocks = <&pwm_src_a>, <&pwm_src_b>;
>> #pwm-cells = <3>;
>> };
>> + - |
>> + pwm@60000 {
>> + compatible = "amlogic,t7-pwm", "amlogic,meson-s4-pwm";
>> + reg = <0x60000 0x24>;
>> + clocks = <&clk_a>, <&clk_b>, <&core>;
>> + clock-names = "clk_a", "clk_b", "core";
>> + #pwm-cells = <3>;
>> + };
>>
>> --
>> 2.49.0
>>
>>
--
Best regards,
Ronald
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next prev parent reply other threads:[~2026-09-25 14:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 15:14 [PATCH 0/3] Add T7 PWM core clock support Ronald Claveau via B4 Relay
2026-09-24 15:14 ` [PATCH 1/3] dt-bindings: pwm: amlogic: Add core clock for T7 Ronald Claveau via B4 Relay
2026-09-24 15:25 ` sashiko-bot
2026-09-24 16:35 ` Conor Dooley
2026-09-25 14:32 ` linux-kernel-dev [this message]
2026-09-24 15:14 ` [PATCH 2/3] pwm: meson: Add optional core clock for S4 PWM Ronald Claveau via B4 Relay
2026-09-24 15:14 ` [PATCH 3/3] arm64: dts: amlogic: t7: Add core clock to PWM controller nodes Ronald Claveau via B4 Relay
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