From: Manivannan Sadhasivam <mani@kernel.org>
To: Hans Zhang <18255117159@163.com>
Cc: bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, jingoohan1@gmail.com,
mx@lists.linux.dev, linuxppc-dev@lists.ozlabs.org,
linux-amlogic@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-arm-msm@vger.kernel.org, sophgo@lists.linux.dev,
linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/3] PCI: dwc: Cache PCIe capability offset and simplify drivers
Date: Tue, 19 May 2026 19:27:53 +0530 [thread overview]
Message-ID: <beqy5ykxgo4ianya6r4mahkkyujs6lly475u26vqaemgqsdnhp@2pn5ipczwc34> (raw)
In-Reply-To: <20260509135152.2241235-1-18255117159@163.com>
On Sat, May 09, 2026 at 09:51:49PM +0800, Hans Zhang wrote:
> The DWC PCIe core and its many platform drivers repeatedly call
> dw_pcie_find_capability(pci, PCI_CAP_ID_EXP) to obtain the offset of the
> PCI Express Capability structure. This is wasteful and makes the code
> verbose. And some even search for the PCI_CAP_ID_EXP offset value within
> the suspend/resume functions.
>
Sashiko has flagged some real issues with this series in accessing DBI space
very early and 'pci->pcie_cap' being 0.
Those needs to be fixed.
- Mani
> Add a cached pcie_cap field in struct dw_pcie and a helper
> dw_pcie_get_pcie_cap() to initialize it once at probe time. Then replace
> all explicit capability searches with the cached value across the
> entire dwc subtree.
>
> Hans Zhang (3):
> PCI: dwc: Add pcie_cap field and helper in designware header
> PCI: dwc: Use cached PCIe capability offset in core
> PCI: dwc: Simplify platform drivers using cached capability offset
>
> drivers/pci/controller/dwc/pci-imx6.c | 6 +--
> .../pci/controller/dwc/pci-layerscape-ep.c | 4 +-
> drivers/pci/controller/dwc/pci-meson.c | 4 +-
> .../pci/controller/dwc/pcie-designware-ep.c | 4 +-
> .../pci/controller/dwc/pcie-designware-host.c | 4 +-
> drivers/pci/controller/dwc/pcie-designware.c | 16 +++---
> drivers/pci/controller/dwc/pcie-designware.h | 17 +++++++
> drivers/pci/controller/dwc/pcie-dw-rockchip.c | 15 +++---
> drivers/pci/controller/dwc/pcie-eswin.c | 3 +-
> drivers/pci/controller/dwc/pcie-fu740.c | 2 +-
> drivers/pci/controller/dwc/pcie-intel-gw.c | 2 +-
> drivers/pci/controller/dwc/pcie-qcom-ep.c | 11 ++--
> drivers/pci/controller/dwc/pcie-qcom.c | 24 ++++-----
> drivers/pci/controller/dwc/pcie-sophgo.c | 8 ++-
> drivers/pci/controller/dwc/pcie-spacemit-k1.c | 5 +-
> drivers/pci/controller/dwc/pcie-spear13xx.c | 6 +--
> drivers/pci/controller/dwc/pcie-tegra194.c | 51 +++++++------------
> 17 files changed, 85 insertions(+), 97 deletions(-)
>
>
> base-commit: 70390501d1944d4e5b8f7352be180fceb3a44132
> --
> 2.34.1
>
--
மணிவண்ணன் சதாசிவம்
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next prev parent reply other threads:[~2026-05-19 13:58 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-09 13:51 Hans Zhang
2026-05-09 13:51 ` [PATCH 1/3] PCI: dwc: Add pcie_cap field and helper in designware header Hans Zhang
2026-05-09 13:51 ` [PATCH 2/3] PCI: dwc: Use cached PCIe capability offset in core Hans Zhang
2026-05-09 13:51 ` [PATCH 3/3] PCI: dwc: Simplify platform drivers using cached capability offset Hans Zhang
2026-05-19 13:57 ` Manivannan Sadhasivam [this message]
2026-05-19 16:09 ` [PATCH 0/3] PCI: dwc: Cache PCIe capability offset and simplify drivers Hans Zhang
2026-05-19 16:15 ` Manivannan Sadhasivam
2026-05-19 16:27 ` Hans Zhang
2026-05-19 16:49 ` Manivannan Sadhasivam
2026-05-19 16:52 ` Hans Zhang
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