mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Ingo Molnar <mingo@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Brian Gerst <brgerst@gmail.com>,
	Chris Metcalf <cmetcalf@mellanox.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Liang Z Li <liang.z.li@intel.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
	Jonathan Corbet <corbet@lwn.net>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Paul Gortmaker <paul.gortmaker@windriver.com>,
	Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
	"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
	Shuah Khan <shuah@kernel.org>,
	linux-kernel@vger.kernel.org, x86@kernel.org,
	ricardo.neri@intel.com,
	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
	Adam Buchbinder <adam.buchbinder@gmail.com>,
	Colin Ian King <colin.king@canonical.com>,
	Lorenzo Stoakes <lstoakes@gmail.com>,
	Qiaowei Ren <qiaowei.ren@intel.com>,
	Arnaldo Carvalho de Melo <acme@redhat.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Kees Cook <keescook@chromium.org>,
	Thomas Garnier <thgarnie@google.com>,
	Dmitry Vyukov <dvyukov@google.com>
Subject: [PATCH v9 15/29] x86/insn-eval: Add utility functions to get segment descriptor base address and limit
Date: Tue,  3 Oct 2017 20:54:18 -0700	[thread overview]
Message-ID: <1507089272-32733-16-git-send-email-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <1507089272-32733-1-git-send-email-ricardo.neri-calderon@linux.intel.com>

With segmentation, the base address of the segment is needed to compute a
linear address. This base address is obtained from the applicable segment
descriptor. Such segment descriptor is referenced from a segment selector.
These new functions obtain the segment base and limit of the segment
selector indicated by segment register index given as argument. This index
is any of the INAT_SEG_REG_* family of #define's.

The logic to obtain the segment selector is wrapped in the function
get_seg_selector() with the inputs described above. Once the selector is
known, the base address is determined. In protected mode, the selector is
used to obtain the segment descriptor and then its base address. In 64-bit
user mode, the segment base address is zero except when FS or GS are used.
In virtual-8086 mode, the base address is computed as the value of the
segment selector shifted 4 positions to the left.

In protected mode, segment limits are enforced. Thus, a function to
determine the limit of the segment is added. Segment limits are not
enforced in long or virtual-8086. For the latter, addresses are limited
to 20 bits; address size will be handled when computing the linear
address.

Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: Lorenzo Stoakes <lstoakes@gmail.com>
Cc: Qiaowei Ren <qiaowei.ren@intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Thomas Garnier <thgarnie@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: x86@kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
 arch/x86/include/asm/insn-eval.h |   1 +
 arch/x86/lib/insn-eval.c         | 117 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 118 insertions(+)

diff --git a/arch/x86/include/asm/insn-eval.h b/arch/x86/include/asm/insn-eval.h
index 7e8c963..25d6e44 100644
--- a/arch/x86/include/asm/insn-eval.h
+++ b/arch/x86/include/asm/insn-eval.h
@@ -13,5 +13,6 @@
 
 void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs);
 int insn_get_modrm_rm_off(struct insn *insn, struct pt_regs *regs);
+unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx);
 
 #endif /* _ASM_X86_INSN_EVAL_H */
diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c
index d599dc3..02c4498 100644
--- a/arch/x86/lib/insn-eval.c
+++ b/arch/x86/lib/insn-eval.c
@@ -507,6 +507,123 @@ static struct desc_struct *get_desc(unsigned short sel)
 }
 
 /**
+ * insn_get_seg_base() - Obtain base address of segment descriptor.
+ * @regs:		Register values as seen when entering kernel mode
+ * @seg_reg_idx:	Index of the segment register pointing to seg descriptor
+ *
+ * Obtain the base address of the segment as indicated by the segment descriptor
+ * pointed by the segment selector. The segment selector is obtained from the
+ * input segment register index seg_reg_idx.
+ *
+ * Returns:
+ *
+ * In protected mode, base address of the segment. Zero in long mode,
+ * except when FS or GS are used. In virtual-8086 mode, the segment
+ * selector shifted 4 positions to the right.
+ *
+ * -1L in case of error.
+ */
+unsigned long insn_get_seg_base(struct pt_regs *regs, int seg_reg_idx)
+{
+	struct desc_struct *desc;
+	short sel;
+
+	sel = get_segment_selector(regs, seg_reg_idx);
+	if (sel < 0)
+		return -1L;
+
+	if (v8086_mode(regs))
+		/*
+		 * Base is simply the segment selector shifted 4
+		 * positions to the right.
+		 */
+		return (unsigned long)(sel << 4);
+
+	if (user_64bit_mode(regs)) {
+		/*
+		 * Only FS or GS will have a base address, the rest of
+		 * the segments' bases are forced to 0.
+		 */
+		unsigned long base;
+
+		if (seg_reg_idx == INAT_SEG_REG_FS)
+			rdmsrl(MSR_FS_BASE, base);
+		else if (seg_reg_idx == INAT_SEG_REG_GS)
+			/*
+			 * swapgs was called at the kernel entry point. Thus,
+			 * MSR_KERNEL_GS_BASE will have the user-space GS base.
+			 */
+			rdmsrl(MSR_KERNEL_GS_BASE, base);
+		else if (seg_reg_idx != INAT_SEG_REG_IGNORE)
+			/* We should ignore the rest of segment registers. */
+			base = -1L;
+		else
+			base = 0;
+		return base;
+	}
+
+	/* In protected mode the segment selector cannot be null. */
+	if (!sel)
+		return -1L;
+
+	desc = get_desc(sel);
+	if (!desc)
+		return -1L;
+
+	return get_desc_base(desc);
+}
+
+/**
+ * get_seg_limit() - Obtain the limit of a segment descriptor
+ * @regs:		Register values as seen when entering kernel mode
+ * @seg_reg_idx:	Index of the segment register pointing to seg descriptor
+ *
+ * Obtain the limit of the segment as indicated by the segment descriptor
+ * pointed by the segment selector. The segment selector is obtained from the
+ * input segment register index seg_reg_idx.
+ *
+ * Returns:
+ *
+ * In protected mode, the limit of the segment descriptor in bytes.
+ * In long mode and virtual-8086 mode, segment limits are not enforced. Thus,
+ * limit is returned as -1L to imply a limit-less segment.
+ *
+ * Zero is returned on error.
+ */
+static unsigned long get_seg_limit(struct pt_regs *regs, int seg_reg_idx)
+{
+	struct desc_struct *desc;
+	unsigned long limit;
+	short sel;
+
+	sel = get_segment_selector(regs, seg_reg_idx);
+	if (sel < 0)
+		return 0;
+
+	if (user_64bit_mode(regs) || v8086_mode(regs))
+		return -1L;
+
+	if (!sel)
+		return 0;
+
+	desc = get_desc(sel);
+	if (!desc)
+		return 0;
+
+	/*
+	 * If the granularity bit is set, the limit is given in multiples
+	 * of 4096. This also means that the 12 least significant bits are
+	 * not tested when checking the segment limits. In practice,
+	 * this means that the segment ends in (limit << 12) + 0xfff.
+	 */
+	limit = get_desc_limit(desc);
+	if (desc->g)
+		limit = (limit << 12) + 0xfff;
+
+	return limit;
+}
+
+/**
  * insn_get_modrm_rm_off() - Obtain register in r/m part of the ModRM byte
  * @insn:	Instruction containing the ModRM byte
  * @regs:	Register values as seen when entering kernel mode
-- 
2.7.4

  parent reply	other threads:[~2017-10-04  4:00 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-04  3:54 [PATCH v9 00/29] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 01/29] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 02/29] x86/boot: Relocate definition of the initial state of CR0 Ricardo Neri
2017-10-26  7:51   ` Andy Lutomirski
2017-10-26  9:00     ` Borislav Petkov
2017-10-26  9:02       ` Andy Lutomirski
2017-10-26 12:55         ` Borislav Petkov
2017-10-27 19:02           ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 03/29] ptrace,x86: Make user_64bit_mode() available to 32-bit builds Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 04/29] uprobes/x86: Use existing definitions for segment override prefixes Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 05/29] x86/mpx: Simplify handling of errors when computing linear addresses Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 06/29] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-10-05  9:41   ` Borislav Petkov
2017-10-05 17:38     ` Neri, Ricardo
2017-10-04  3:54 ` [PATCH v9 07/29] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 08/29] x86/mpx: Do not use SIB.base if its value is 101b and ModRM.mod = 0 Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 09/29] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 10/29] x86/insn-eval: Do not BUG on invalid register type Ricardo Neri
2017-10-07 16:22   ` Borislav Petkov
2017-10-09 23:56     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 11/29] x86/insn-eval: Add a utility function to get register offsets Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 12/29] x86/insn-eval: Add utility function to identify string instructions Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 13/29] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-10-10 22:41   ` Borislav Petkov
2017-10-12  1:12     ` Ricardo Neri
2017-10-12  9:48       ` Borislav Petkov
2017-10-13  1:08         ` Ricardo Neri
2017-10-13 11:37           ` Borislav Petkov
2017-10-13 18:43             ` Ricardo Neri
2017-10-17  9:35               ` Borislav Petkov
2017-10-17 20:31                 ` Ricardo Neri
2017-10-18 20:29                   ` Borislav Petkov
2017-10-19  6:30                     ` Ricardo Neri
2017-10-20  7:55                       ` Borislav Petkov
2017-10-20 18:05                         ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 14/29] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-10-11 14:57   ` Borislav Petkov
2017-10-12  0:45     ` Ricardo Neri
2017-10-04  3:54 ` Ricardo Neri [this message]
2017-10-11 15:15   ` [PATCH v9 15/29] x86/insn-eval: Add utility functions to get segment descriptor base address and limit Borislav Petkov
2017-10-11 19:57     ` Ricardo Neri
2017-10-11 20:16       ` Borislav Petkov
2017-10-12  1:24         ` Ricardo Neri
2017-10-12 16:02           ` Borislav Petkov
2017-10-04  3:54 ` [PATCH v9 16/29] x86/insn-eval: Add function to get default params of code segment Ricardo Neri
2017-10-12 16:31   ` Borislav Petkov
2017-10-12 18:27     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 17/29] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 101b Ricardo Neri
2017-10-20 15:44   ` Borislav Petkov
2017-10-20 18:07     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 18/29] x86/insn-eval: Incorporate segment base in linear address computation Ricardo Neri
2017-10-20 16:08   ` Borislav Petkov
2017-10-20 18:10     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 19/29] x86/insn-eval: Add support to resolve 32-bit address encodings Ricardo Neri
2017-10-20 17:12   ` Borislav Petkov
2017-10-20 18:24     ` Ricardo Neri
2017-10-20 18:38       ` Borislav Petkov
2017-10-20 19:16         ` Ricardo Neri
2017-10-20 22:04           ` Borislav Petkov
2017-10-04  3:54 ` [PATCH v9 20/29] x86/insn-eval: Add wrapper function for 32 and 64-bit addresses Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 21/29] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 22/29] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 23/29] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 24/29] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 25/29] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-10-26  7:59   ` Andy Lutomirski
2017-10-27 21:46     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 26/29] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 27/29] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 28/29] selftests/x86: Add tests for User-Mode Instruction Prevention Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 29/29] selftests/x86: Add tests for instruction str and sldt Ricardo Neri

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1507089272-32733-16-git-send-email-ricardo.neri-calderon@linux.intel.com \
    --to=ricardo.neri-calderon@linux.intel.com \
    --cc=acme@redhat.com \
    --cc=adam.buchbinder@gmail.com \
    --cc=adrian.hunter@intel.com \
    --cc=akpm@linux-foundation.org \
    --cc=bp@suse.de \
    --cc=brgerst@gmail.com \
    --cc=cmetcalf@mellanox.com \
    --cc=colin.king@canonical.com \
    --cc=corbet@lwn.net \
    --cc=dave.hansen@linux.intel.com \
    --cc=dvyukov@google.com \
    --cc=hpa@zytor.com \
    --cc=jslaby@suse.cz \
    --cc=keescook@chromium.org \
    --cc=liang.z.li@intel.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lstoakes@gmail.com \
    --cc=luto@kernel.org \
    --cc=mhiramat@kernel.org \
    --cc=mingo@redhat.com \
    --cc=mst@redhat.com \
    --cc=paul.gortmaker@windriver.com \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=qiaowei.ren@intel.com \
    --cc=ravi.v.shankar@intel.com \
    --cc=ray.huang@amd.com \
    --cc=ricardo.neri@intel.com \
    --cc=shuah@kernel.org \
    --cc=slaoub@gmail.com \
    --cc=tglx@linutronix.de \
    --cc=thgarnie@google.com \
    --cc=vbabka@suse.cz \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®