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From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Ingo Molnar <mingo@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Brian Gerst <brgerst@gmail.com>,
	Chris Metcalf <cmetcalf@mellanox.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Liang Z Li <liang.z.li@intel.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Huang Rui <ray.huang@amd.com>, Jiri Slaby <jslaby@suse.cz>,
	Jonathan Corbet <corbet@lwn.net>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Paul Gortmaker <paul.gortmaker@windriver.com>,
	Vlastimil Babka <vbabka@suse.cz>, Chen Yucong <slaoub@gmail.com>,
	"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
	Shuah Khan <shuah@kernel.org>,
	linux-kernel@vger.kernel.org, x86@kernel.org,
	ricardo.neri@intel.com,
	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
	Adam Buchbinder <adam.buchbinder@gmail.com>,
	Colin Ian King <colin.king@canonical.com>,
	Lorenzo Stoakes <lstoakes@gmail.com>,
	Qiaowei Ren <qiaowei.ren@intel.com>,
	Arnaldo Carvalho de Melo <acme@redhat.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Kees Cook <keescook@chromium.org>,
	Thomas Garnier <thgarnie@google.com>,
	Dmitry Vyukov <dvyukov@google.com>
Subject: [PATCH v9 19/29] x86/insn-eval: Add support to resolve 32-bit address encodings
Date: Tue,  3 Oct 2017 20:54:22 -0700	[thread overview]
Message-ID: <1507089272-32733-20-git-send-email-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <1507089272-32733-1-git-send-email-ricardo.neri-calderon@linux.intel.com>

32-bit and 64-bit address encodings are identical. Thus, the same logic
could be used to resolve the effective address. However, there are two key
differences: address size and enforcement of segment limits.

If running a 32-bit process on a 64-bit kernel, it is best to perform
the address calculation using 32-bit data types. In this manner hardware
is used for the arithmetic, including handling of signs and overflows.

32-bit addresses are generally used in protected mode; segment limits are
enforced in this mode. This implementation obtains the limit of the
segment associated with the instruction operands and prefixes. If the
computed address is outside the segment limits, an error is returned. It
is also possible to use 32-bit address in long mode and virtual-8086 mode
by using an address override prefix. In such cases, segment limits are not
enforced.

The new function get_addr_ref_32() is almost identical to the existing
function insn_get_addr_ref() (used for 64-bit addresses); except for the
differences mentioned above. For the sake of simplicity and readability,
it is better to use two separate functions.

Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Adam Buchbinder <adam.buchbinder@gmail.com>
Cc: Colin Ian King <colin.king@canonical.com>
Cc: Lorenzo Stoakes <lstoakes@gmail.com>
Cc: Qiaowei Ren <qiaowei.ren@intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Thomas Garnier <thgarnie@google.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
Cc: x86@kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
 arch/x86/lib/insn-eval.c | 160 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 160 insertions(+)

diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c
index b3aa891..945c9b7 100644
--- a/arch/x86/lib/insn-eval.c
+++ b/arch/x86/lib/insn-eval.c
@@ -712,6 +712,166 @@ int insn_get_modrm_rm_off(struct insn *insn, struct pt_regs *regs)
 	return get_reg_offset(insn, regs, REG_TYPE_RM);
 }
 
+/**
+ * get_addr_ref_32() - Obtain a 32-bit linear address
+ * @insn:	Instruction with ModRM, SIB bytes and displacement
+ * @regs:	Register values as seen when entering kernel mode
+ *
+ * This function is to be used with 32-bit address encodings to obtain the
+ * linear memory address referred by the instruction's ModRM, SIB,
+ * displacement bytes and segment base address, as applicable. If in protected
+ * mode, segment limits are enforced.
+ *
+ * Returns:
+ *
+ * Linear address referenced by instruction and registers on success.
+ *
+ * -1L on error.
+ */
+static void __user *get_addr_ref_32(struct insn *insn, struct pt_regs *regs)
+{
+	int eff_addr, base, indx, addr_offset, base_offset, indx_offset;
+	unsigned long linear_addr = -1L, seg_base_addr, seg_limit, tmp;
+	int seg_reg_indx;
+	insn_byte_t sib;
+
+	insn_get_modrm(insn);
+	insn_get_sib(insn);
+	sib = insn->sib.value;
+
+	if (insn->addr_bytes != 4)
+		goto out;
+
+	if (X86_MODRM_MOD(insn->modrm.value) == 3) {
+		addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM);
+		if (addr_offset < 0)
+			goto out;
+
+		tmp = regs_get_register(regs, addr_offset);
+		/* The 4 most significant bytes must be zero. */
+		if (tmp & ~0xffffffffL)
+			goto out;
+
+		eff_addr = (int)(tmp & 0xffffffff);
+
+		seg_reg_indx = resolve_seg_reg(insn, regs, addr_offset);
+		if (seg_reg_indx < 0)
+			goto out;
+
+		seg_base_addr = insn_get_seg_base(regs, seg_reg_indx);
+		if (seg_base_addr == -1L)
+			goto out;
+
+		seg_limit = get_seg_limit(regs, seg_reg_indx);
+	} else {
+		if (insn->sib.nbytes) {
+			/*
+			 * Negative values in the base and index offset means
+			 * an error when decoding the SIB byte. Except -EDOM,
+			 * which means that the registers should not be used
+			 * in the address computation.
+			 */
+			base_offset = get_reg_offset(insn, regs, REG_TYPE_BASE);
+			if (base_offset == -EDOM) {
+				base = 0;
+			} else if (base_offset < 0) {
+				goto out;
+			} else {
+				tmp = regs_get_register(regs, base_offset);
+				/* The 4 most significant bytes must be zero. */
+				if (tmp & ~0xffffffffL)
+					goto out;
+
+				base = (int)(tmp & 0xffffffff);
+			}
+
+			indx_offset = get_reg_offset(insn, regs, REG_TYPE_INDEX);
+			if (indx_offset == -EDOM) {
+				indx = 0;
+			} else if (indx_offset < 0) {
+				goto out;
+			} else {
+				tmp = regs_get_register(regs, indx_offset);
+				/* The 4 most significant bytes must be zero. */
+				if (tmp & ~0xffffffffL)
+					goto out;
+
+				indx = (int)(tmp & 0xffffffff);
+			}
+
+			eff_addr = base + indx * (1 << X86_SIB_SCALE(sib));
+
+			seg_reg_indx = resolve_seg_reg(insn, regs, base_offset);
+			if (seg_reg_indx < 0)
+				goto out;
+
+			seg_base_addr = insn_get_seg_base(regs, seg_reg_indx);
+			if (seg_base_addr == -1L)
+				goto out;
+
+			seg_limit = get_seg_limit(regs, seg_reg_indx);
+		} else {
+			addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM);
+
+			/*
+			 * -EDOM means that we must ignore the address_offset.
+			 * In such a case, in 64-bit mode the effective address
+			 * relative to the RIP of the following instruction.
+			 */
+			if (addr_offset == -EDOM) {
+				if (user_64bit_mode(regs))
+					eff_addr = (long)regs->ip + insn->length;
+				else
+					eff_addr = 0;
+			} else if (addr_offset < 0) {
+				goto out;
+			} else {
+				tmp = regs_get_register(regs, addr_offset);
+				/* The 4 most significant bytes must be zero. */
+				if (tmp & ~0xffffffffL)
+					goto out;
+
+				eff_addr = (int)(tmp & 0xffffffff);
+			}
+
+			seg_reg_indx = resolve_seg_reg(insn, regs, addr_offset);
+			if (seg_reg_indx < 0)
+				goto out;
+
+			seg_base_addr = insn_get_seg_base(regs, seg_reg_indx);
+			if (seg_base_addr == -1L)
+				goto out;
+
+			seg_limit = get_seg_limit(regs, seg_reg_indx);
+		}
+		eff_addr += insn->displacement.value;
+	}
+
+	/*
+	 * In protected mode, before computing the linear address, make sure
+	 * the effective address is within the limits of the segment.
+	 * 32-bit addresses can be used in long and virtual-8086 modes if an
+	 * address override prefix is used. In such cases, segment limits are
+	 * not enforced. When in virtual-8086 mode, the segment limit is -1L
+	 * to reflect this situation.
+	 *
+	 * After computed, the effective address is treated as an unsigned
+	 * quantity.
+	 */
+	if (!user_64bit_mode(regs) && ((unsigned int)eff_addr > seg_limit))
+		goto out;
+
+	/*
+	 * Data type long could be 64 bits in size. Ensure that our 32-bit
+	 * effective address is not sign-extended when computing the linear
+	 * address.
+	 */
+	linear_addr = (unsigned long)(eff_addr & 0xffffffff) + seg_base_addr;
+
+out:
+	return (void __user *)linear_addr;
+}
+
 /*
  * return the address being referenced be instruction
  * for rm=3 returning the content of the rm reg
-- 
2.7.4

  parent reply	other threads:[~2017-10-04  3:55 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-04  3:54 [PATCH v9 00/29] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 01/29] x86/mm: Relocate page fault error codes to traps.h Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 02/29] x86/boot: Relocate definition of the initial state of CR0 Ricardo Neri
2017-10-26  7:51   ` Andy Lutomirski
2017-10-26  9:00     ` Borislav Petkov
2017-10-26  9:02       ` Andy Lutomirski
2017-10-26 12:55         ` Borislav Petkov
2017-10-27 19:02           ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 03/29] ptrace,x86: Make user_64bit_mode() available to 32-bit builds Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 04/29] uprobes/x86: Use existing definitions for segment override prefixes Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 05/29] x86/mpx: Simplify handling of errors when computing linear addresses Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 06/29] x86/mpx: Use signed variables to compute effective addresses Ricardo Neri
2017-10-05  9:41   ` Borislav Petkov
2017-10-05 17:38     ` Neri, Ricardo
2017-10-04  3:54 ` [PATCH v9 07/29] x86/mpx: Do not use SIB.index if its value is 100b and ModRM.mod is not 11b Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 08/29] x86/mpx: Do not use SIB.base if its value is 101b and ModRM.mod = 0 Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 09/29] x86/mpx, x86/insn: Relocate insn util functions to a new insn-eval file Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 10/29] x86/insn-eval: Do not BUG on invalid register type Ricardo Neri
2017-10-07 16:22   ` Borislav Petkov
2017-10-09 23:56     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 11/29] x86/insn-eval: Add a utility function to get register offsets Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 12/29] x86/insn-eval: Add utility function to identify string instructions Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 13/29] x86/insn-eval: Add utility functions to get segment selector Ricardo Neri
2017-10-10 22:41   ` Borislav Petkov
2017-10-12  1:12     ` Ricardo Neri
2017-10-12  9:48       ` Borislav Petkov
2017-10-13  1:08         ` Ricardo Neri
2017-10-13 11:37           ` Borislav Petkov
2017-10-13 18:43             ` Ricardo Neri
2017-10-17  9:35               ` Borislav Petkov
2017-10-17 20:31                 ` Ricardo Neri
2017-10-18 20:29                   ` Borislav Petkov
2017-10-19  6:30                     ` Ricardo Neri
2017-10-20  7:55                       ` Borislav Petkov
2017-10-20 18:05                         ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 14/29] x86/insn-eval: Add utility function to get segment descriptor Ricardo Neri
2017-10-11 14:57   ` Borislav Petkov
2017-10-12  0:45     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 15/29] x86/insn-eval: Add utility functions to get segment descriptor base address and limit Ricardo Neri
2017-10-11 15:15   ` Borislav Petkov
2017-10-11 19:57     ` Ricardo Neri
2017-10-11 20:16       ` Borislav Petkov
2017-10-12  1:24         ` Ricardo Neri
2017-10-12 16:02           ` Borislav Petkov
2017-10-04  3:54 ` [PATCH v9 16/29] x86/insn-eval: Add function to get default params of code segment Ricardo Neri
2017-10-12 16:31   ` Borislav Petkov
2017-10-12 18:27     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 17/29] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 101b Ricardo Neri
2017-10-20 15:44   ` Borislav Petkov
2017-10-20 18:07     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 18/29] x86/insn-eval: Incorporate segment base in linear address computation Ricardo Neri
2017-10-20 16:08   ` Borislav Petkov
2017-10-20 18:10     ` Ricardo Neri
2017-10-04  3:54 ` Ricardo Neri [this message]
2017-10-20 17:12   ` [PATCH v9 19/29] x86/insn-eval: Add support to resolve 32-bit address encodings Borislav Petkov
2017-10-20 18:24     ` Ricardo Neri
2017-10-20 18:38       ` Borislav Petkov
2017-10-20 19:16         ` Ricardo Neri
2017-10-20 22:04           ` Borislav Petkov
2017-10-04  3:54 ` [PATCH v9 20/29] x86/insn-eval: Add wrapper function for 32 and 64-bit addresses Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 21/29] x86/insn-eval: Handle 32-bit address encodings in virtual-8086 mode Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 22/29] x86/insn-eval: Add support to resolve 16-bit addressing encodings Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 23/29] x86/cpufeature: Add User-Mode Instruction Prevention definitions Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 24/29] x86: Add emulation code for UMIP instructions Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 25/29] x86/umip: Force a page fault when unable to copy emulated result to user Ricardo Neri
2017-10-26  7:59   ` Andy Lutomirski
2017-10-27 21:46     ` Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 26/29] x86: Enable User-Mode Instruction Prevention Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 27/29] x86/traps: Fixup general protection faults caused by UMIP Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 28/29] selftests/x86: Add tests for User-Mode Instruction Prevention Ricardo Neri
2017-10-04  3:54 ` [PATCH v9 29/29] selftests/x86: Add tests for instruction str and sldt Ricardo Neri

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