From: Manikanta Maddireddy <mmaddireddy@nvidia.com>
To: Jingoo Han <jingoohan1@gmail.com>,
Manivannan Sadhasivam <mani@kernel.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
"Krzysztof Wilczynski" <kwilczynski@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>, <linux-pci@vger.kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Thierry Reding <thierry.reding@kernel.org>,
Jonathan Hunter <jonathanh@nvidia.com>,
Vidya Sagar <vidyas@nvidia.com>,
Niklas Cassel <cassel@kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-tegra@vger.kernel.org>,
Manikanta Maddireddy <mmaddireddy@nvidia.com>
Subject: [PATCH 4/5] PCI: tegra194: Use standard RAS event selector mask
Date: Wed, 23 Sep 2026 12:47:05 +0530 [thread overview]
Message-ID: <20260923071706.1134320-5-mmaddireddy@nvidia.com> (raw)
In-Reply-To: <20260923071706.1134320-1-mmaddireddy@nvidia.com>
Use the common DesignWare EVENT_COUNTER_EVENT_SEL_MASK name after the
complete RAS-DES event selector field mask has replaced the old narrow
value mask.
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
drivers/pci/controller/dwc/pcie-tegra194.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 3cfb386dd433..2462da8664e0 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -618,7 +618,7 @@ static inline u32 event_counter_prog(struct tegra_pcie_dw *pcie, u32 event)
val = dw_pcie_readl_dbi(&pcie->pci, pcie->ras_des_cap +
PCIE_RAS_DES_EVENT_COUNTER_CONTROL);
- FIELD_MODIFY(EVENT_COUNTER_EVENT_SEL_FIELD_MASK, &val, event);
+ FIELD_MODIFY(EVENT_COUNTER_EVENT_SEL_MASK, &val, event);
FIELD_MODIFY(EVENT_COUNTER_GROUP_SEL_MASK, &val, EVENT_COUNTER_GROUP_5);
FIELD_MODIFY(EVENT_COUNTER_ENABLE_MASK, &val, EVENT_COUNTER_ENABLE_ALL);
dw_pcie_writel_dbi(&pcie->pci, pcie->ras_des_cap +
--
2.34.1
next prev parent reply other threads:[~2026-09-23 7:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 7:17 [PATCH 0/5] PCI: dwc: Clean up RAS-DES and register field handling Manikanta Maddireddy
2026-09-23 7:17 ` [PATCH 1/5] PCI: dwc: Add RAS event counter field masks Manikanta Maddireddy
2026-09-23 7:17 ` [PATCH 2/5] PCI: tegra194: Use FIELD_*() for register fields Manikanta Maddireddy
2026-09-23 7:17 ` [PATCH 3/5] PCI: dwc: Drop unused shift macros Manikanta Maddireddy
2026-09-23 7:17 ` Manikanta Maddireddy [this message]
2026-09-23 7:17 ` [PATCH 5/5] PCI: dwc: Consolidate RAS-DES event counter fields Manikanta Maddireddy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260923071706.1134320-5-mmaddireddy@nvidia.com \
--to=mmaddireddy@nvidia.com \
--cc=bhelgaas@google.com \
--cc=cassel@kernel.org \
--cc=jingoohan1@gmail.com \
--cc=jonathanh@nvidia.com \
--cc=kwilczynski@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=robh@kernel.org \
--cc=thierry.reding@kernel.org \
--cc=vidyas@nvidia.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®