Re: [PATCH v13 1/2] dt-bindings: phy: rockchip: naneng-combphy: add rockchip,sgmii-mac-sel property

[Conor Dooley <conor@kernel.org>]

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On Wed, Oct 07, 2026 at 12:28:05AM +0800, Coia Prant wrote:
> On RK3568, the SGMII interface can be routed to either GMAC0 or
> GMAC1 via the pipe_sgmii_mac_sel bit in the pipe GRF registers.
> 
> Add the optional "rockchip,sgmii-mac-sel" property to allow the
> device tree to select which GMAC controller is used for SGMII.
> 
> The property takes a value of 0 (GMAC0) or 1 (GMAC1). The hardware
> reset value is 1 (GMAC1), but this can be overridden by setting the
> property to 0 for boards where SGMII is connected to GMAC0.
> 
> If this property is absent, the driver leaves the routing unchanged.
> 
> This is necessary for boards such as the Ariaboard Photonicat, where
> the SGMII interface is connected to GMAC0 and needs to be explicitly
> configured.

I've written about 3 responses to this and deleted them all.

This feels like something that should be set by some existing mechanism,
like the phys property, or by the mac driver when it realises it is in
sgmii mode - but I think neither actually fits here? The latter doesn't
work since you need to differentiate between instances there anyway,
which requires some info, and the former doesn't work with phy-cells
being 1, since that 1 cell is needed for the phy mode itself.
The other thing is pinctrl, while there's no "pin" here, it's
determining routing within the soc which is the realm of pinctrl,
probably pinctrl-single. But I think that's just really way
over-complicating everything... Plus, Rob didn't yell about this aspect
of things when he yelled about the other things you were doing, so
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

Thanks,
Conor.

> 
> Signed-off-by: Coia Prant <coiaprant@gmail.com>
> ---
>  .../bindings/phy/phy-rockchip-naneng-combphy.yaml   | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
> index 379b08bd9e97a..442a1df193ad2 100644
> --- a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
> @@ -80,6 +80,15 @@ properties:
>      description:
>        Some additional pipe settings are accessed through GRF regs.
>  
> +  rockchip,sgmii-mac-sel:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [0, 1]
> +    description:
> +      Select gmac0 or gmac1 to be used as SGMII controller.
> +      Set this to 0 to route SGMII to GMAC0.
> +      Set this to 1 to route SGMII to GMAC1.
> +      If this property is absent, the driver leaves the routing unchanged.
> +
>    "#phy-cells":
>      const: 1
>  
> @@ -105,6 +114,10 @@ allOf:
>            maxItems: 1
>          reset-names:
>            maxItems: 1
> +        rockchip,sgmii-mac-sel: true
> +    else:
> +      properties:
> +        rockchip,sgmii-mac-sel: false
>    - if:
>        properties:
>          compatible:
> -- 
> 2.47.3
> 

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