* [PATCH] x86/apic/msi: Fix MSI interrupt affinity configuration
@ 2026-09-28 16:48 WeitaoWang-oc
2026-09-29 16:29 ` Koichiro Den
0 siblings, 1 reply; 3+ messages in thread
From: WeitaoWang-oc @ 2026-09-28 16:48 UTC (permalink / raw)
To: tglx, mingo, bp, dave.hansen, x86, hpa, den, linux-kernel
Cc: WeitaoWang, wwt8723, CobeChen, stable
commit b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI
quirk") try to fix the issue of misconfigured non-maskable MSI quirk.
For non-maskable MSI interrupts, use the slow path to fix the MSI affinity
race. Maskable MSI interrupts use the direct path to update configuration
info. However, the current code logic is the opposite as only maskable
MSI interrupts will enable reservation mode.
Fixes: ef8dd01538ea ("genirq/msi: Make interrupt allocation less convoluted")
Cc: stable@vger.kernel.org
Signed-off-by: Weitao Wang <WeitaoWang-oc@zhaoxin.com>
---
arch/x86/kernel/apic/msi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
index 66bc5d3e79db..da5f44a80313 100644
--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -62,7 +62,7 @@ msi_set_affinity(struct irq_data *irqd, const struct cpumask *mask, bool force)
* - The interrupt is not yet started up
* - The new destination CPU is the same as the old destination CPU
*/
- if (!irqd_can_reserve(irqd) ||
+ if (irqd_can_reserve(irqd) ||
cfg->vector == old_cfg.vector ||
old_cfg.vector == MANAGED_IRQ_SHUTDOWN_VECTOR ||
!irqd_is_started(irqd) ||
--
2.32.0
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] x86/apic/msi: Fix MSI interrupt affinity configuration
2026-09-28 16:48 [PATCH] x86/apic/msi: Fix MSI interrupt affinity configuration WeitaoWang-oc
@ 2026-09-29 16:29 ` Koichiro Den
2026-09-30 7:33 ` WeitaoWang-oc
0 siblings, 1 reply; 3+ messages in thread
From: Koichiro Den @ 2026-09-29 16:29 UTC (permalink / raw)
To: WeitaoWang-oc
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, linux-kernel, WeitaoWang,
wwt8723, CobeChen, stable
On Tue, Sep 29, 2026 at 12:48:39AM +0800, WeitaoWang-oc wrote:
> commit b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI
> quirk") try to fix the issue of misconfigured non-maskable MSI quirk.
> For non-maskable MSI interrupts, use the slow path to fix the MSI affinity
> race. Maskable MSI interrupts use the direct path to update configuration
> info. However, the current code logic is the opposite as only maskable
> MSI interrupts will enable reservation mode.
Hi Weitao, thanks for catching this.
>
> Fixes: ef8dd01538ea ("genirq/msi: Make interrupt allocation less convoluted")
I'd rather (or also) add:
Fixes: b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI quirk")
As I recall, I started out trying to fix the issue, but then got too focused on
removing the flag. I missed that the check needed to be inverted. This
left the race unfixed and also made maskable interrupts possibly take the slow
path unnecessarily. Sorry for the trouble. Feel free to use this if it helps:
Reviewed-by: Koichiro Den <den@valinux.co.jp>
Best regards,
Koichiro
> Cc: stable@vger.kernel.org
> Signed-off-by: Weitao Wang <WeitaoWang-oc@zhaoxin.com>
> ---
> arch/x86/kernel/apic/msi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c
> index 66bc5d3e79db..da5f44a80313 100644
> --- a/arch/x86/kernel/apic/msi.c
> +++ b/arch/x86/kernel/apic/msi.c
> @@ -62,7 +62,7 @@ msi_set_affinity(struct irq_data *irqd, const struct cpumask *mask, bool force)
> * - The interrupt is not yet started up
> * - The new destination CPU is the same as the old destination CPU
> */
> - if (!irqd_can_reserve(irqd) ||
> + if (irqd_can_reserve(irqd) ||
> cfg->vector == old_cfg.vector ||
> old_cfg.vector == MANAGED_IRQ_SHUTDOWN_VECTOR ||
> !irqd_is_started(irqd) ||
> --
> 2.32.0
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] x86/apic/msi: Fix MSI interrupt affinity configuration
2026-09-29 16:29 ` Koichiro Den
@ 2026-09-30 7:33 ` WeitaoWang-oc
0 siblings, 0 replies; 3+ messages in thread
From: WeitaoWang-oc @ 2026-09-30 7:33 UTC (permalink / raw)
To: Koichiro Den
Cc: tglx, mingo, bp, dave.hansen, x86, hpa, linux-kernel, WeitaoWang,
wwt8723, CobeChen, stable
On 9/30/26 00:29, Koichiro Den wrote:
> On Tue, Sep 29, 2026 at 12:48:39AM +0800, WeitaoWang-oc wrote:
>> commit b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI
>> quirk") try to fix the issue of misconfigured non-maskable MSI quirk.
>> For non-maskable MSI interrupts, use the slow path to fix the MSI affinity
>> race. Maskable MSI interrupts use the direct path to update configuration
>> info. However, the current code logic is the opposite as only maskable
>> MSI interrupts will enable reservation mode.
>
> Hi Weitao, thanks for catching this.
>
>>
>> Fixes: ef8dd01538ea ("genirq/msi: Make interrupt allocation less convoluted")
>
> I'd rather (or also) add:
>
> Fixes: b56ebe7c896d ("x86/apic/msi: Fix misconfigured non-maskable MSI quirk")
>
> As I recall, I started out trying to fix the issue, but then got too focused on
> removing the flag. I missed that the check needed to be inverted. This
> left the race unfixed and also made maskable interrupts possibly take the slow
> path unnecessarily. Sorry for the trouble. Feel free to use this if it helps:
>
> Reviewed-by: Koichiro Den <den@valinux.co.jp>
>
> Best regards,
> Koichiro
Hi Koichiro,
Thank you four suggestion and review. I'll send a v2 patch.
Best Regards,
Weitao
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-09-28 16:48 [PATCH] x86/apic/msi: Fix MSI interrupt affinity configuration WeitaoWang-oc
2026-09-29 16:29 ` Koichiro Den
2026-09-30 7:33 ` WeitaoWang-oc
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