[PATCH 1/3] arm64: dts: imx8mm-tqma8mqml: restrict clock for SPI-NOR flash

[PATCH 1/3] arm64: dts: imx8mm-tqma8mqml: restrict clock for SPI-NOR flash

[Alexander Stein]

From: Markus Niebel <Markus.Niebel@ew.tq-group.com>

The FlexSPI controller uses quad SPI with internal clock recovery.
The clock is therefore restricted to 66.666666 MHz according to
data sheet.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
 arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
index 1b5ba3c47164f..48285bcbe9bbb 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi
@@ -60,7 +60,7 @@ &flexspi {
 	flash0: flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <84000000>;
+		spi-max-frequency = <66666666>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
 		vcc-supply = <&buck5_reg>;
-- 
2.55.0

[PATCH 2/3] arm64: dts: imx8mn-tqma8mqnl: restrict clock for SPI-NOR flash

[Alexander Stein]

From: Markus Niebel <Markus.Niebel@ew.tq-group.com>

The FlexSPI controller uses quad SPI with internal clock recovery.
The clock is therefore restricted to 66.666666 MHz according to
data sheet.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
 arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
index 48a687926aa1b..c88d83243097f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
@@ -63,7 +63,7 @@ &flexspi {
 	flash0: flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <84000000>;
+		spi-max-frequency = <66666666>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
 		vcc-supply = <&buck5_reg>;
-- 
2.55.0

[PATCH 3/3] arm64: dts: imx8mp-tqma8mpql: restrict clock for SPI-NOR flash

[Alexander Stein]

From: Markus Niebel <Markus.Niebel@ew.tq-group.com>

The FlexSPI controller uses quad SPI with internal clock recovery.
The clock is therefore restricted to 66.666666 MHz according to
data sheet.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
 arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
index 9716f24f7c6ed..0593bcb450a57 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
@@ -47,7 +47,7 @@ &flexspi {
 	flash0: flash@0 {
 		reg = <0>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <80000000>;
+		spi-max-frequency = <66666666>;
 		spi-tx-bus-width = <1>;
 		spi-rx-bus-width = <4>;
 		vcc-supply = <&buck5_reg>;
-- 
2.55.0

Re: [PATCH 2/3] arm64: dts: imx8mn-tqma8mqnl: restrict clock for SPI-NOR flash

[Frank Li]

On Tue, Oct 06, 2026 at 03:25:10PM +0200, Alexander Stein wrote:
> From: Markus Niebel <Markus.Niebel@ew.tq-group.com>
>
> The FlexSPI controller uses quad SPI with internal clock recovery.
> The clock is therefore restricted to 66.666666 MHz according to
> data sheet.

Which datasheet? I suppose NOR flash datasheet, can you provide link
here.

Frank

>
> Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
> index 48a687926aa1b..c88d83243097f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
> @@ -63,7 +63,7 @@ &flexspi {
>  	flash0: flash@0 {
>  		compatible = "jedec,spi-nor";
>  		reg = <0>;
> -		spi-max-frequency = <84000000>;
> +		spi-max-frequency = <66666666>;
>  		spi-tx-bus-width = <1>;
>  		spi-rx-bus-width = <4>;
>  		vcc-supply = <&buck5_reg>;
> --
> 2.55.0
>
>

Re: [PATCH 2/3] arm64: dts: imx8mn-tqma8mqnl: restrict clock for SPI-NOR flash

[Alexander Stein]

Am Dienstag, 6. Oktober 2026, 15:46:50 Mitteleuropäische Sommerzeit schrieb Frank Li:
> On Tue, Oct 06, 2026 at 03:25:10PM +0200, Alexander Stein wrote:
> > From: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> >
> > The FlexSPI controller uses quad SPI with internal clock recovery.
> > The clock is therefore restricted to 66.666666 MHz according to
> > data sheet.
> 
> Which datasheet? I suppose NOR flash datasheet, can you provide link
> here.

The i.MX8M Nano data sheet Rev 5 09/2022 section 3.9.1.1 "SDR mode with
FlexSPIn_MCR0[RXCLKSRC] = 0x0, 0x1, 0x2" Table 55. "FlexSPI input timing
in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x0" lists 66 Mhz maximum for
"Frequency of operation".

Best regards
Alexander

> Frank
> 
> >
> > Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
> > index 48a687926aa1b..c88d83243097f 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi
> > @@ -63,7 +63,7 @@ &flexspi {
> >  	flash0: flash@0 {
> >  		compatible = "jedec,spi-nor";
> >  		reg = <0>;
> > -		spi-max-frequency = <84000000>;
> > +		spi-max-frequency = <66666666>;
> >  		spi-tx-bus-width = <1>;
> >  		spi-rx-bus-width = <4>;
> >  		vcc-supply = <&buck5_reg>;
> > --
> > 2.55.0
> >
> >
> 


-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/

Re: [PATCH 2/3] arm64: dts: imx8mn-tqma8mqnl: restrict clock for SPI-NOR flash

[Fabio Estevam]

Hi Alexander,

On Tue, Oct 6, 2026 at 10:50 AM Alexander Stein
<alexander.stein@ew.tq-group.com> wrote:
>
> Am Dienstag, 6. Oktober 2026, 15:46:50 Mitteleuropäische Sommerzeit schrieb Frank Li:
> > On Tue, Oct 06, 2026 at 03:25:10PM +0200, Alexander Stein wrote:
> > > From: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> > >
> > > The FlexSPI controller uses quad SPI with internal clock recovery.
> > > The clock is therefore restricted to 66.666666 MHz according to
> > > data sheet.
> >
> > Which datasheet? I suppose NOR flash datasheet, can you provide link
> > here.
>
> The i.MX8M Nano data sheet Rev 5 09/2022 section 3.9.1.1 "SDR mode with
> FlexSPIn_MCR0[RXCLKSRC] = 0x0, 0x1, 0x2" Table 55. "FlexSPI input timing
> in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x0" lists 66 Mhz maximum for
> "Frequency of operation".

From the commit log, I also got the impression you were referring to
the SPI NOR datasheet.

Please clarify that in v2.

Also, shouldn't all patches in the series contain a Fixes: tag?

Re: [PATCH 2/3] arm64: dts: imx8mn-tqma8mqnl: restrict clock for SPI-NOR flash

[Alexander Stein]

Hi Fabio,

Am Dienstag, 6. Oktober 2026, 15:59:22 Mitteleuropäische Sommerzeit schrieb Fabio Estevam:
> Hi Alexander,
> 
> On Tue, Oct 6, 2026 at 10:50 AM Alexander Stein
> <alexander.stein@ew.tq-group.com> wrote:
> >
> > Am Dienstag, 6. Oktober 2026, 15:46:50 Mitteleuropäische Sommerzeit schrieb Frank Li:
> > > On Tue, Oct 06, 2026 at 03:25:10PM +0200, Alexander Stein wrote:
> > > > From: Markus Niebel <Markus.Niebel@ew.tq-group.com>
> > > >
> > > > The FlexSPI controller uses quad SPI with internal clock recovery.
> > > > The clock is therefore restricted to 66.666666 MHz according to
> > > > data sheet.
> > >
> > > Which datasheet? I suppose NOR flash datasheet, can you provide link
> > > here.
> >
> > The i.MX8M Nano data sheet Rev 5 09/2022 section 3.9.1.1 "SDR mode with
> > FlexSPIn_MCR0[RXCLKSRC] = 0x0, 0x1, 0x2" Table 55. "FlexSPI input timing
> > in SDR mode where FlexSPIn_MCR0[RXCLKSRC] = 0x0" lists 66 Mhz maximum for
> > "Frequency of operation".
> 
> From the commit log, I also got the impression you were referring to
> the SPI NOR datasheet.
> 
> Please clarify that in v2.
> 
> Also, shouldn't all patches in the series contain a Fixes: tag?

Thanks for the feedback, I'll adjust the commit message in v2 and
add a Fixes: tag as well.

Best regards
Alexander
-- 
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/