Re: [PATCH v7 00/15] Ambarella CV75 SoC minimal bring-up

[Linus Walleij <linusw@kernel.org>]

Hi Long,

On Tue, Sep 15, 2026 at 1:15 PM Long Zhao via B4 Relay
<devnull+longzhao.ambarella.com@kernel.org> wrote:

> This series adds minimal Ambarella CV75 support for early bring-up with
> a serial console: DT bindings, RCT clocks, pinctrl, PL061 GPIO via
> gpio-regmap, 8250_dw UART quirks, ARCH_AMBARELLA, CV75 EVK DT, and
> MAINTAINERS.
>
> This is a single unified series. Please apply via the SoC
> tree; subsystem maintainers are Cc'd for their pieces.
>
> GPIO data path uses gpio-regmap with two layouts (ARM PrimeCell and
> Ambarella). IRQ stays a custom PL061 irqchip: a linear domain is
> created after gpio_regmap_register(), attached with
> gpiochip_irqchip_add_domain() via gpio_regmap_get_chip(), and the
> chained handler uses gpio_chip as chip data. gpio-regmap girq and
> regmap-irq are not used.

You patchset is big and complex yet you do quick respins.

This indicates you might be using an LLM.

It is required by kernel procedures to disclose this
with:

Assisted-by: LLM

added to each patch, if this is the case.

Yours,
Linus Walleij