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From: "Michael Walle" <michael@walle.cc>
To: <longzhao@ambarella.com>, "Arnd Bergmann" <arnd@arndb.de>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	<soc@lists.linux.dev>, <linux-arm-kernel@lists.infradead.org>
Cc: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Jerome Brunet" <jbrunet@baylibre.com>,
	"Linus Walleij" <linusw@kernel.org>,
	"Bartosz Golaszewski" <brgl@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Jiri Slaby" <jirislaby@kernel.org>,
	"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Will Deacon" <will@kernel.org>, "Long Zhao" <zl020895@163.com>,
	"Lee Jones" <lee@kernel.org>,
	mfd@lists.linux.dev, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 08/15] gpiolib: regmap: add write_data_after_dir quirk
Date: Mon, 21 Sep 2026 14:59:17 +0200	[thread overview]
Message-ID: <DLL0GV4PAJYJ.1JU0HPWE6K0LA@walle.cc> (raw)
In-Reply-To: <20260915-cv75-v5-v7-8-3297d3fbc9c0@ambarella.com>

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On Tue Sep 15, 2026 at 1:15 PM CEST, Long Zhao via B4 Relay wrote:
> From: Long Zhao <longzhao@ambarella.com>
>
> Some controllers ignore data-register writes while a line is still an
> input. Optionally write the output value again after switching the
> direction, matching the existing PL061 behaviour.
>
> Signed-off-by: Long Zhao <longzhao@ambarella.com>
> ---
>  drivers/gpio/gpio-regmap.c  | 20 ++++++++++++++++++--
>  include/linux/gpio/regmap.h |  8 ++++++++
>  2 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpio/gpio-regmap.c b/drivers/gpio/gpio-regmap.c
> index 51b4d69b8740..dfcc1f1122ec 100644
> --- a/drivers/gpio/gpio-regmap.c
> +++ b/drivers/gpio/gpio-regmap.c
> @@ -31,6 +31,7 @@ struct gpio_regmap {
>  	unsigned int reg_clr_base;
>  	unsigned int reg_dir_in_base;
>  	unsigned int reg_dir_out_base;
> +	bool write_data_after_dir;


Can we just have some quirk flags for these? First, this actually
describe what it is - a quirk - and in the future, we don't have to
copy all the flags individually in _register().

Also maybe QUIRK_SET_AFTER_DIR. The whole driver doesn't mention a
data register.

>  	unsigned long *fixed_direction_mask;
>  	unsigned long *fixed_direction_output;
>  
> @@ -271,9 +272,22 @@ static int gpio_regmap_direction_output(struct gpio_chip *chip,
>  			return ret;
>  	}
>  
> -	gpio_regmap_set(chip, offset, value);
> +	ret = gpio_regmap_set(chip, offset, value);
> +	if (ret)
> +		return ret;
> +
> +	ret = gpio_regmap_set_direction(chip, offset, true);
> +	if (ret)
> +		return ret;
>  
> -	return gpio_regmap_set_direction(chip, offset, true);
> +	/*
> +	 * gpio value is set again, because pl061 doesn't allow to set value of
> +	 * a gpio pin before configuring it in OUT mode.

Is this copied from the old code? Not sure, why pl061 have to be
referenced here.

-michael

> +	 */
> +	if (gpio->write_data_after_dir)
> +		return gpio_regmap_set(chip, offset, value);
> +
> +	return 0;
>  }
>  
>  void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio)
> @@ -376,6 +390,8 @@ struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config
>  			    config->fixed_direction_output, chip->ngpio);
>  	}
>  
> +	gpio->write_data_after_dir = config->write_data_after_dir;
> +
>  	/* if not set, assume there is only one register */
>  	gpio->ngpio_per_reg = config->ngpio_per_reg;
>  	if (!gpio->ngpio_per_reg)
> diff --git a/include/linux/gpio/regmap.h b/include/linux/gpio/regmap.h
> index 06255756710d..d7ffc12b00a2 100644
> --- a/include/linux/gpio/regmap.h
> +++ b/include/linux/gpio/regmap.h
> @@ -48,6 +48,13 @@ struct regmap;
>   *			(Optional) Bitmap representing the fixed direction of
>   *			the GPIO lines. Useful when there are GPIO lines with a
>   *			fixed direction mixed together in the same register.
> + * @write_data_after_dir:
> + *			(Optional) Write the output value again after
> + *			switching a line to output in ->direction_output().
> + *			Needed for hardware which ignores data register
> + *			writes while the line is configured as an input.
> + *			This is a legacy quirk (e.g. ARM PL061); new hardware
> + *			must not use it. Direction changes will glitch.
>   * @drvdata:		(Optional) Pointer to driver specific data which is
>   *			not used by gpio-remap but is provided "as is" to the
>   *			driver callback(s).
> @@ -94,6 +101,7 @@ struct gpio_regmap_config {
>  	unsigned int reg_dir_out_base;
>  	int reg_stride;
>  	int ngpio_per_reg;
> +	bool write_data_after_dir;
>  	struct irq_domain *irq_domain;
>  	unsigned long *fixed_direction_mask;
>  	unsigned long *fixed_direction_output;


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  parent reply	other threads:[~2026-09-21 12:59 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 11:15 [PATCH v7 00/15] Ambarella CV75 SoC minimal bring-up Long Zhao via B4 Relay
2026-09-15 11:15 ` [PATCH v7 01/15] dt-bindings: arm: add Ambarella CV75 platforms Long Zhao via B4 Relay
2026-09-15 11:15 ` [PATCH v7 02/15] dt-bindings: mfd: syscon: add Ambarella CV75 secure scratchpad Long Zhao via B4 Relay
2026-09-15 11:15 ` [PATCH v7 03/15] dt-bindings: clock: add Ambarella CV75 RCT Long Zhao via B4 Relay
2026-09-15 11:15 ` [PATCH v7 04/15] dt-bindings: pinctrl: add Ambarella CV75 pinctrl Long Zhao via B4 Relay
2026-09-15 11:15 ` [PATCH v7 05/15] dt-bindings: gpio: pl061: add Ambarella CV75 variant Long Zhao via B4 Relay
2026-09-18  7:15   ` Krzysztof Kozlowski
2026-09-18  8:33     ` zl020895
2026-09-15 11:15 ` [PATCH v7 06/15] dt-bindings: serial: snps-dw-apb-uart: add ambarella,cv75-uart Long Zhao via B4 Relay
2026-09-15 11:15 ` [PATCH v7 07/15] clk: ambarella: add CV75 RCT clock controller Long Zhao via B4 Relay
2026-09-15 13:24   ` Uwe Kleine-König
2026-09-15 13:27   ` Andy Shevchenko
2026-09-15 11:15 ` [PATCH v7 08/15] gpiolib: regmap: add write_data_after_dir quirk Long Zhao via B4 Relay
2026-09-15 15:07   ` Andy Shevchenko
2026-09-16  4:47     ` zl020895
2026-09-20 22:02   ` Linus Walleij
2026-09-21  3:52     ` zl020895
2026-09-21 12:59   ` Michael Walle [this message]
2026-09-15 11:15 ` [PATCH v7 09/15] gpiolib: regmap: add gpio_regmap_get_chip() Long Zhao via B4 Relay
2026-09-15 15:30   ` Andy Shevchenko
2026-09-16  4:49     ` zl020895
2026-09-21 12:48   ` Michael Walle
2026-09-22  4:22     ` zl020895
2026-09-23  6:57       ` Michael Walle
2026-09-15 11:15 ` [PATCH v7 10/15] gpio: pl061: convert to gpio-regmap and a custom irqchip Long Zhao via B4 Relay
2026-09-16 10:21   ` Andy Shevchenko
2026-09-21 13:16   ` Michael Walle
2026-09-15 11:15 ` [PATCH v7 11/15] gpio: pl061: add Ambarella register-layout variant Long Zhao via B4 Relay
2026-09-16 10:51   ` Andy Shevchenko
2026-09-20 22:24   ` Linus Walleij
2026-09-15 11:15 ` [PATCH v7 12/15] pinctrl: ambarella: add CV75 pin controller Long Zhao via B4 Relay
2026-09-16 10:49   ` Andy Shevchenko
2026-09-17  9:06     ` zl020895
2026-09-17 12:22       ` Andy Shevchenko
2026-09-17 12:55         ` zl020895
2026-09-15 11:15 ` [PATCH v7 13/15] serial: 8250_dw: add Ambarella CV75 quirks Long Zhao via B4 Relay
2026-09-15 11:47   ` Ilpo Järvinen
2026-09-15 13:21   ` Andy Shevchenko
2026-09-15 11:15 ` [PATCH v7 14/15] arm64: ambarella: add ARCH_AMBARELLA and CV75 EVK DT Long Zhao via B4 Relay
2026-09-15 11:15 ` [PATCH v7 15/15] MAINTAINERS: add ARM/AMBARELLA SoC support Long Zhao via B4 Relay
2026-09-16  9:14 ` [PATCH v7 00/15] Ambarella CV75 SoC minimal bring-up Bartosz Golaszewski
2026-09-16  9:42   ` Linus Walleij
2026-09-16 10:23     ` Andy Shevchenko
2026-09-16 11:01       ` zl020895
2026-09-16 15:20         ` Andy Shevchenko
2026-09-17  9:05           ` zl020895
2026-09-21 12:46 ` Michael Walle
2026-09-22  4:19   ` zl020895
2026-09-22  7:30 ` Linus Walleij
2026-09-22  8:43   ` zl020895
2026-09-22  8:52     ` Linus Walleij
2026-09-22  9:02       ` zl020895

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