From: Steven Price <steven.price@arm.com>
To: "Adrián Larumbe" <adrian.larumbe@collabora.com>
Cc: Boris Brezillon <boris.brezillon@collabora.com>,
Rob Herring <robh@kernel.org>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Faith Ekstrand <faith.ekstrand@collabora.com>,
"Marty E. Plummer" <hanetzer@startmail.com>,
Tomeu Vizoso <tomeu@tomeuvizoso.net>,
Eric Anholt <eric@anholt.net>,
Robin Murphy <robin.murphy@arm.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Collabora Kernel Team <kernel@collabora.com>,
Neil Armstrong <neil.armstrong@linaro.org>
Subject: Re: [PATCH v12 12/15] drm/panfrost: Skip cache flush/invalidate when enabling perfcnt
Date: Wed, 7 Oct 2026 14:09:35 +0100 [thread overview]
Message-ID: <00bd53b9-c6b6-4d84-aaeb-aeade3ffb3fb@arm.com> (raw)
In-Reply-To: <179130511905.1018806.3717655233851799587.b4-reply@b4>
On 06/10/2026 17:45, Adrián Larumbe wrote:
> On 2026-10-02 16:14:38+01:00, Steven Price wrote:
>> On 29/09/2026 04:44, Adrián Larumbe wrote:
>>
>>> The GPU cache flush/invalidate operation is unnecessary. First off, the
>>> GPU doesn't read off the perfcnt sample buffer, only writes into it, so
>>
>> I don't think this is entirely true. The GPU performance counter unit
>> only writes the counters that are enabled, counters that share a cache
>> line but are not enabled are not written by the performance counter
>> unit, but if the L2 contains that cache line then the write can hit in
>> the L2 and dirty the entire line including stale data where the
>> unwritten cache line is.
>
> From the perspective of UM, is it bad if offsets into the perfcnt buffer
> that stand for counters they did not enable contain undefined values?
There's two things to consider here:
* Does the UM care? The UM could write canary values to check that the
GPU has actually filled in the counters. Replacing them with "undefined"
values would break this behaviour. I'm not sure whether this is done -
but it can be used to check that the hardware is actually writing the
counter as expected.
* Is it a security hole? If the GPU cache was from when this BO was used
by another context then this is obviously bad. As Boris pointed out this
shouldn't be possible in the current driver if we're invalidating on unmap.
>> The upshot is that if the CPU has cleared a block of memory which the
>> GPU happens to have cached, then the "unused" counters may end up
>> showing the old data before the CPU cleared it (if they share a cache
>> line with an active counter).
>>
>> I have to admit it's probably somewhat academic given that Panfrost
>> doesn't expose the ability to control which counters are enabled...
>>
>> Is there a good reason for this patch (i.e. have you seen a performance
>> problem with doing the invalidate)? Otherwise I'd prefer we keep to the
>> safe route rather than trying to over optimise cache maintenance.
>
> Like Boris said in a later reply, it was mostly about simplifying error handling
> in the perfcnt enable path. We saw this initial clean being done and thought it
> wasn't necessary.
I think we need at least a comment explaining why this is safe. It does
seem that as things currently stand we don't actually need it though.
Thanks,
Steve
>> Obviously in the fully coherent case the invalidate could be skipped (as
>> in the next patch).
>>
>> Thanks,
>> Steve
>
>
next prev parent reply other threads:[~2026-10-07 13:09 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-29 3:44 [PATCH v12 00/15] Collection of fixes for Panfrost: Perfcnt, RPM, refactorings Adrián Larumbe
2026-09-29 3:44 ` [PATCH v12 01/15] drm/panfrost: Move shrinker initialization and unplug one level down Adrián Larumbe
2026-10-02 13:58 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 02/15] drm/panfrost: Move lock and modparam initialisations into their subsystems Adrián Larumbe
2026-10-02 14:06 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 03/15] drm/panfrost: Move debugfs initialisation to relevant subsystems Adrián Larumbe
2026-10-02 14:10 ` Steven Price
2026-10-06 0:50 ` Adrián Larumbe
2026-09-29 3:44 ` [PATCH v12 04/15] drm/panfrost: Skip NULL checks for clock enable/disabling Adrián Larumbe
2026-10-02 14:14 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 05/15] drm/panfrost: Consolidate device clock management and reset Adrián Larumbe
2026-10-02 14:20 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 06/15] drm/panfrost: Fix PM refcnt and autosuspend issues at device probe/remove Adrián Larumbe
2026-10-02 14:21 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 07/15] drm/panfrost: Explicitly enable MMU interrupts at device init Adrián Larumbe
2026-10-02 14:26 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 08/15] drm/panfrost: Move all DRM device initialisation into device_init() Adrián Larumbe
2026-10-02 14:37 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 09/15] drm/panfrost: Add warning messages to fatal error conditions Adrián Larumbe
2026-10-02 14:59 ` Steven Price
2026-10-06 15:09 ` Adrián Larumbe
2026-10-07 12:51 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 10/15] drm/panfrost: Add debugfs knob for manually triggering a GPU reset Adrián Larumbe
2026-10-02 15:10 ` Steven Price
2026-10-06 13:38 ` Adrián Larumbe
2026-10-07 12:54 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 11/15] drm/panfrost: Move perfcnt GPU disable sequence into a helper Adrián Larumbe
2026-09-29 3:44 ` [PATCH v12 12/15] drm/panfrost: Skip cache flush/invalidate when enabling perfcnt Adrián Larumbe
2026-10-02 15:14 ` Steven Price
2026-10-05 8:38 ` Boris Brezillon
2026-10-05 15:06 ` Steven Price
2026-10-05 15:37 ` Boris Brezillon
2026-10-05 16:05 ` Steven Price
2026-10-05 16:57 ` Boris Brezillon
2026-10-06 17:42 ` Adrián Larumbe
2026-10-06 17:35 ` Adrián Larumbe
2026-10-07 13:28 ` Steven Price
2026-10-06 17:18 ` Adrián Larumbe
2026-10-07 13:21 ` Steven Price
2026-10-06 16:45 ` Adrián Larumbe
2026-10-07 13:09 ` Steven Price [this message]
2026-09-29 3:44 ` [PATCH v12 13/15] drm/panfrost: Avoid cache flush after perfcnt sample in fully coherent systems Adrián Larumbe
2026-10-02 15:28 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 14/15] drm/panfrost: Introduce a reset lock Adrián Larumbe
2026-10-02 15:34 ` Steven Price
2026-09-29 3:44 ` [PATCH v12 15/15] drm/panfrost: Fix races between perfcnt and reset sequence Adrián Larumbe
2026-10-02 15:44 ` Steven Price
2026-10-06 14:14 ` Adrián Larumbe
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