mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: <ryan.wanner@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<claudiu.beznea@tuxon.dev>, <bmasney@redhat.com>,
	<alexander.sverdlin@gmail.com>,
	<varshini.rajendran@microchip.com>
Cc: <cristian.birsan@microchip.com>,
	<balamanikandan.gunasundar@microchip.com>,
	<linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v5 22/31] clk: at91: sam9x60: switch to parent_hw and parent_data
Date: Fri, 16 Jan 2026 13:07:15 -0700	[thread overview]
Message-ID: <562cb1e4a6890dd846720ecf68e0505ec32a450b.1768512290.git.ryan.wanner@microchip.com> (raw)
In-Reply-To: <cover.1768512290.git.ryan.wanner@microchip.com>

From: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Switch SAM9X60 clocks to use modern parent_hw and parent_data.

Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 drivers/clk/at91/sam9x60.c | 93 +++++++++++++++++++++-----------------
 1 file changed, 51 insertions(+), 42 deletions(-)

diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 2ab7deab95f3..97131de5ba20 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -81,9 +81,9 @@ static const struct clk_pcr_layout sam9x60_pcr_layout = {
 	.pid_mask = GENMASK(6, 0),
 };
 
-static const struct {
+static struct {
 	char *n;
-	char *p;
+	struct clk_hw *parent_hw;
 	unsigned long flags;
 	u8 id;
 } sam9x60_systemck[] = {
@@ -91,11 +91,11 @@ static const struct {
 	 * ddrck feeds DDR controller and is enabled by bootloader thus we need
 	 * to keep it enabled in case there is no Linux consumer for it.
 	 */
-	{ .n = "ddrck",  .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
-	{ .n = "uhpck",  .p = "usbck",    .id = 6 },
-	{ .n = "pck0",   .p = "prog0",    .id = 8 },
-	{ .n = "pck1",   .p = "prog1",    .id = 9 },
-	{ .n = "qspick", .p = "masterck_div", .id = 19 },
+	{ .n = "ddrck",  .id = 2, .flags = CLK_IS_CRITICAL },
+	{ .n = "uhpck",  .id = 6 },
+	{ .n = "pck0",   .id = 8 },
+	{ .n = "pck1",   .id = 9 },
+	{ .n = "qspick", .id = 19 },
 };
 
 static const struct {
@@ -186,13 +186,13 @@ static const struct {
 
 static void __init sam9x60_pmc_setup(struct device_node *np)
 {
+	const char *main_xtal_name, *td_slck_name, *md_slck_name;
+	struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
 	struct clk_range range = CLK_RANGE(0, 0);
-	const char *td_slck_name, *md_slck_name, *mainxtal_name;
+	struct clk_parent_data parent_data[6];
 	struct pmc_data *sam9x60_pmc;
-	const char *parent_names[6];
-	struct clk_hw *main_osc_hw;
+	struct clk_hw *usbck_hw;
 	struct regmap *regmap;
-	struct clk_hw *hw;
 	int i;
 
 	i = of_property_match_string(np, "clock-names", "td_slck");
@@ -210,7 +210,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 	i = of_property_match_string(np, "clock-names", "main_xtal");
 	if (i < 0)
 		return;
-	mainxtal_name = of_clk_get_parent_name(np, i);
+
+	main_xtal_name = of_clk_get_parent_name(np, i);
 
 	regmap = device_node_to_regmap(np);
 	if (IS_ERR(regmap))
@@ -223,19 +224,20 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 	if (!sam9x60_pmc)
 		return;
 
-	hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
-					   50000000);
-	if (IS_ERR(hw))
+	main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+						   50000000);
+	if (IS_ERR(main_rc_hw))
 		goto err_free;
 
-	hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
+	main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+						 &AT91_CLK_PD_NAME(main_xtal_name),
+						 0);
 	if (IS_ERR(hw))
 		goto err_free;
-	main_osc_hw = hw;
 
-	parent_names[0] = "main_rc_osc";
-	parent_names[1] = "main_osc";
-	hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+	parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+	parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+	hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
 	if (IS_ERR(hw))
 		goto err_free;
 
@@ -256,7 +258,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 		goto err_free;
 
 	hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "pllack_divck",
-					  "pllack_fracck", NULL, 0, &plla_characteristics,
+					  NULL, hw, 0, &plla_characteristics,
 					  &pll_div_layout,
 					   /*
 					    * This feeds CPU. It should not
@@ -277,7 +279,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 		goto err_free;
 
 	hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "upllck_divck",
-					  "upllck_fracck", NULL, 1, &upll_characteristics,
+					  NULL, hw, 1, &upll_characteristics,
 					  &pll_div_layout,
 					  CLK_SET_RATE_GATE |
 					  CLK_SET_PARENT_GATE |
@@ -287,17 +289,17 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 
 	sam9x60_pmc->chws[PMC_UTMI] = hw;
 
-	parent_names[0] = md_slck_name;
-	parent_names[1] = "mainck";
-	parent_names[2] = "pllack_divck";
+	parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+	parent_data[1] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MAIN]);
+	parent_data[2] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_PLLACK]);
 	hw = at91_clk_register_master_pres(regmap, "masterck_pres", 3,
-					   parent_names, NULL, &sam9x60_master_layout,
+					   NULL, parent_data, &sam9x60_master_layout,
 					   &mck_characteristics, &mck_lock);
 	if (IS_ERR(hw))
 		goto err_free;
 
 	hw = at91_clk_register_master_div(regmap, "masterck_div",
-					  "masterck_pres", NULL, &sam9x60_master_layout,
+					  NULL, &AT91_CLK_PD_HW(hw), &sam9x60_master_layout,
 					  &mck_characteristics, &mck_lock,
 					  CLK_SET_RATE_GATE, 0);
 	if (IS_ERR(hw))
@@ -305,26 +307,26 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 
 	sam9x60_pmc->chws[PMC_MCK] = hw;
 
-	parent_names[0] = "pllack_divck";
-	parent_names[1] = "upllck_divck";
-	parent_names[2] = "main_osc";
-	hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, NULL, 3);
-	if (IS_ERR(hw))
+	parent_data[0] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_PLLACK]);
+	parent_data[1] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_UTMI]);
+	parent_data[2] = AT91_CLK_PD_HW(main_osc_hw);
+	usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", NULL, parent_data, 3);
+	if (IS_ERR(usbck_hw))
 		goto err_free;
 
-	parent_names[0] = md_slck_name;
-	parent_names[1] = td_slck_name;
-	parent_names[2] = "mainck";
-	parent_names[3] = "masterck_div";
-	parent_names[4] = "pllack_divck";
-	parent_names[5] = "upllck_divck";
+	parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+	parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
+	parent_data[2] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MAIN]);
+	parent_data[3] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MCK]);
+	parent_data[4] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_PLLACK]);
+	parent_data[5] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_UTMI]);
 	for (i = 0; i < 2; i++) {
 		char name[6];
 
 		snprintf(name, sizeof(name), "prog%d", i);
 
 		hw = at91_clk_register_programmable(regmap, name,
-						    parent_names, NULL, 6, i,
+						    NULL, parent_data, 6, i,
 						    &sam9x60_programmable_layout,
 						    NULL);
 		if (IS_ERR(hw))
@@ -333,9 +335,15 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 		sam9x60_pmc->pchws[i] = hw;
 	}
 
+	/* Set systemck parent hws. */
+	sam9x60_systemck[0].parent_hw = sam9x60_pmc->chws[PMC_MCK];
+	sam9x60_systemck[1].parent_hw = usbck_hw;
+	sam9x60_systemck[2].parent_hw = sam9x60_pmc->pchws[0];
+	sam9x60_systemck[3].parent_hw = sam9x60_pmc->pchws[1];
+	sam9x60_systemck[4].parent_hw = sam9x60_pmc->chws[PMC_MCK];
 	for (i = 0; i < ARRAY_SIZE(sam9x60_systemck); i++) {
 		hw = at91_clk_register_system(regmap, sam9x60_systemck[i].n,
-					      sam9x60_systemck[i].p, NULL,
+					      NULL, &AT91_CLK_PD_HW(sam9x60_systemck[i].parent_hw),
 					      sam9x60_systemck[i].id,
 					      sam9x60_systemck[i].flags);
 		if (IS_ERR(hw))
@@ -348,7 +356,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 		hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
 							 &sam9x60_pcr_layout,
 							 sam9x60_periphck[i].n,
-							 "masterck_div", NULL,
+							 NULL,
+							 &AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MCK]),
 							 sam9x60_periphck[i].id,
 							 &range, INT_MIN,
 							 sam9x60_periphck[i].flags);
@@ -362,7 +371,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
 		hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
 						 &sam9x60_pcr_layout,
 						 sam9x60_gck[i].n,
-						 parent_names, NULL, NULL, 6,
+						 NULL, parent_data, NULL, 6,
 						 sam9x60_gck[i].id,
 						 &sam9x60_gck[i].r, INT_MIN);
 		if (IS_ERR(hw))
-- 
2.43.0


  parent reply	other threads:[~2026-01-16 20:07 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-16 20:06 [PATCH v5 00/31] clk: at91: add support for parent_data and ryan.wanner
2026-01-16 20:06 ` [PATCH v5 01/31] clk: at91: pmc: add macros for clk_parent_data ryan.wanner
2026-01-31 14:25   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 02/31] clk: at91: pmc: Move macro to header file ryan.wanner
2026-01-31 14:26   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data ryan.wanner
2026-01-26  8:51   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data ryan.wanner
2026-01-26  8:53   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 05/31] clk: at91: clk-peripheral: switch to clk_parent_data ryan.wanner
2026-01-26  8:52   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 06/31] clk: at91: clk-main: switch to clk parent data ryan.wanner
2026-01-26  8:52   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 07/31] clk: at91: clk-utmi: use clk_parent_data ryan.wanner
2026-01-26  8:52   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 08/31] clk: at91: clk-master: " ryan.wanner
2026-01-31 14:29   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 09/31] clk: at91: clk-programmable: " ryan.wanner
2026-01-26  8:53   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 10/31] clk: at91: clk-generated: " ryan.wanner
2026-01-30  6:56   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 11/31] clk: at91: clk-usb: add support for clk_parent_data ryan.wanner
2026-01-30  7:06   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 12/31] clk: at91: clk-system: use clk_parent_data ryan.wanner
2026-01-30  7:08   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 13/31] clk: at91: sama7d65: switch system clocks to parent_hw and parent_data ryan.wanner
2026-01-30  7:14   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 14/31] clk: at91: clk-pll: add support for parent_hw ryan.wanner
2026-01-30  7:18   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 15/31] clk: at91: clk-audio-pll: " ryan.wanner
2026-01-30  7:21   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 16/31] clk: at91: clk-plldiv: add support for parent_data ryan.wanner
2026-01-31 10:51   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 17/31] clk: at91: clk-h32mx: " ryan.wanner
2026-01-31 10:53   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 18/31] clk: at91: clk-i2s-mux: " ryan.wanner
2026-01-31 10:54   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 19/31] clk: at91: clk-smd: add support for clk_parent_data ryan.wanner
2026-01-31 10:57   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 20/31] clk: at91: clk-slow: add support for parent_data ryan.wanner
2026-01-31 11:00   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data ryan.wanner
2026-01-31 11:02   ` claudiu beznea
2026-01-16 20:07 ` ryan.wanner [this message]
2026-01-31 11:05   ` [PATCH v5 22/31] clk: at91: sam9x60: " claudiu beznea
2026-01-16 20:07 ` [PATCH v5 23/31] clk: at91: sama5d2: " ryan.wanner
2026-01-31 11:11   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 24/31] clk: at91: sama5d3: switch to parent_data and parent_hw ryan.wanner
2026-01-31 11:14   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 25/31] clk: at91: sama5d4: " ryan.wanner
2026-01-17 18:30   ` kernel test robot
2026-01-16 20:07 ` [PATCH v5 26/31] clk: at91: at91sam9x5: " ryan.wanner
2026-01-31 14:04   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 27/31] clk: at91: at91rm9200: switch to parent_hw and parent_data ryan.wanner
2026-01-31 14:13   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 28/31] clk: at91: at91sam9260: " ryan.wanner
2026-01-31 14:16   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 29/31] clk: at91: at91sam9g45: switch to parent_data and parent_hw ryan.wanner
2026-01-31 14:19   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 30/31] clk: at91: at91sam9n12: switch to parent_hw and parent_data ryan.wanner
2026-01-31 14:22   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 31/31] clk: at91: at91sam9rl: switch to clk_parent_data ryan.wanner
2026-01-31 14:24   ` Claudiu Beznea

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=562cb1e4a6890dd846720ecf68e0505ec32a450b.1768512290.git.ryan.wanner@microchip.com \
    --to=ryan.wanner@microchip.com \
    --cc=alexander.sverdlin@gmail.com \
    --cc=alexandre.belloni@bootlin.com \
    --cc=balamanikandan.gunasundar@microchip.com \
    --cc=bmasney@redhat.com \
    --cc=claudiu.beznea@tuxon.dev \
    --cc=cristian.birsan@microchip.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=nicolas.ferre@microchip.com \
    --cc=sboyd@kernel.org \
    --cc=varshini.rajendran@microchip.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®