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From: <ryan.wanner@microchip.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
	<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<claudiu.beznea@tuxon.dev>, <bmasney@redhat.com>,
	<alexander.sverdlin@gmail.com>,
	<varshini.rajendran@microchip.com>
Cc: <cristian.birsan@microchip.com>,
	<balamanikandan.gunasundar@microchip.com>,
	<linux-clk@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v5 27/31] clk: at91: at91rm9200: switch to parent_hw and parent_data
Date: Fri, 16 Jan 2026 13:07:20 -0700	[thread overview]
Message-ID: <806fd8452ad32be1d129fd541b5cbd1be7fbb9f1.1768512290.git.ryan.wanner@microchip.com> (raw)
In-Reply-To: <cover.1768512290.git.ryan.wanner@microchip.com>

From: Claudiu Beznea <claudiu.beznea@tuxon.dev>

Switch AT91RM9200 clocks to use parent_hw and parent_data where possible.
Having parent_hw instead of parent names improves to clock registration
speed and re-parenting. Update clock registration functions to use
clk_hw struct.

Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 drivers/clk/at91/at91rm9200.c | 79 ++++++++++++++++++++---------------
 1 file changed, 46 insertions(+), 33 deletions(-)

diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c
index 623e232ec9c6..20bb51ec683f 100644
--- a/drivers/clk/at91/at91rm9200.c
+++ b/drivers/clk/at91/at91rm9200.c
@@ -11,7 +11,7 @@ static DEFINE_SPINLOCK(rm9200_mck_lock);
 
 struct sck {
 	char *n;
-	char *p;
+	struct clk_hw *parent_hw;
 	u8 id;
 };
 
@@ -39,13 +39,13 @@ static const struct clk_pll_characteristics rm9200_pll_characteristics = {
 	.out = rm9200_pll_out,
 };
 
-static const struct sck at91rm9200_systemck[] = {
-	{ .n = "udpck", .p = "usbck",    .id = 1 },
-	{ .n = "uhpck", .p = "usbck",    .id = 4 },
-	{ .n = "pck0",  .p = "prog0",    .id = 8 },
-	{ .n = "pck1",  .p = "prog1",    .id = 9 },
-	{ .n = "pck2",  .p = "prog2",    .id = 10 },
-	{ .n = "pck3",  .p = "prog3",    .id = 11 },
+static struct sck at91rm9200_systemck[] = {
+	{ .n = "udpck", .id = 1 },
+	{ .n = "uhpck", .id = 4 },
+	{ .n = "pck0",  .id = 8 },
+	{ .n = "pck1",  .id = 9 },
+	{ .n = "pck2",  .id = 10 },
+	{ .n = "pck3",  .id = 11 },
 };
 
 static const struct pck at91rm9200_periphck[] = {
@@ -77,11 +77,11 @@ static const struct pck at91rm9200_periphck[] = {
 static void __init at91rm9200_pmc_setup(struct device_node *np)
 {
 	const char *slowxtal_name, *mainxtal_name;
+	struct clk_hw *usbck_hw, *main_osc_hw, *hw;
+	struct clk_parent_data parent_data[6];
 	struct pmc_data *at91rm9200_pmc;
 	u32 usb_div[] = { 1, 2, 0, 0 };
-	const char *parent_names[6];
 	struct regmap *regmap;
-	struct clk_hw *hw;
 	int i;
 	bool bypass;
 
@@ -108,18 +108,21 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 
 	bypass = of_property_read_bool(np, "atmel,osc-bypass");
 
-	hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
-					bypass);
-	if (IS_ERR(hw))
+	main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+						 &AT91_CLK_PD_NAME(mainxtal_name),
+						 bypass);
+	if (IS_ERR(main_osc_hw))
 		goto err_free;
 
-	hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
+	hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL,
+					   &AT91_CLK_PD_HW(main_osc_hw));
 	if (IS_ERR(hw))
 		goto err_free;
 
 	at91rm9200_pmc->chws[PMC_MAIN] = hw;
 
-	hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+	hw = at91_clk_register_pll(regmap, "pllack", NULL,
+				   &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]), 0,
 				   &at91rm9200_pll_layout,
 				   &rm9200_pll_characteristics);
 	if (IS_ERR(hw))
@@ -127,7 +130,8 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 
 	at91rm9200_pmc->chws[PMC_PLLACK] = hw;
 
-	hw = at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1,
+	hw = at91_clk_register_pll(regmap, "pllbck", NULL,
+				   &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]), 1,
 				   &at91rm9200_pll_layout,
 				   &rm9200_pll_characteristics);
 	if (IS_ERR(hw))
@@ -135,20 +139,19 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 
 	at91rm9200_pmc->chws[PMC_PLLBCK] = hw;
 
-	parent_names[0] = slowxtal_name;
-	parent_names[1] = "mainck";
-	parent_names[2] = "pllack";
-	parent_names[3] = "pllbck";
+	parent_data[0] = AT91_CLK_PD_NAME(slowxtal_name);
+	parent_data[1] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]);
+	parent_data[2] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLACK]);
+	parent_data[3] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLBCK]);
 	hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
-					   parent_names, NULL,
+					   NULL, parent_data,
 					   &at91rm9200_master_layout,
 					   &rm9200_mck_characteristics,
 					   &rm9200_mck_lock);
 	if (IS_ERR(hw))
 		goto err_free;
 
-	hw = at91_clk_register_master_div(regmap, "masterck_div",
-					  "masterck_pres", NULL,
+	hw = at91_clk_register_master_div(regmap, "masterck_div", NULL, &AT91_CLK_PD_HW(hw),
 					  &at91rm9200_master_layout,
 					  &rm9200_mck_characteristics,
 					  &rm9200_mck_lock, CLK_SET_RATE_GATE, 0);
@@ -157,21 +160,23 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 
 	at91rm9200_pmc->chws[PMC_MCK] = hw;
 
-	hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", NULL, usb_div);
-	if (IS_ERR(hw))
+	usbck_hw = at91rm9200_clk_register_usb(regmap, "usbck", NULL,
+					       &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLBCK]),
+					       usb_div);
+	if (IS_ERR(usbck_hw))
 		goto err_free;
 
-	parent_names[0] = slowxtal_name;
-	parent_names[1] = "mainck";
-	parent_names[2] = "pllack";
-	parent_names[3] = "pllbck";
+	parent_data[0] = AT91_CLK_PD_NAME(slowxtal_name);
+	parent_data[1] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]);
+	parent_data[2] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLACK]);
+	parent_data[3] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLBCK]);
 	for (i = 0; i < 4; i++) {
 		char name[6];
 
 		snprintf(name, sizeof(name), "prog%d", i);
 
 		hw = at91_clk_register_programmable(regmap, name,
-						    parent_names, NULL, 4, i,
+						    NULL, parent_data, 4, i,
 						    &at91rm9200_programmable_layout,
 						    NULL);
 		if (IS_ERR(hw))
@@ -180,9 +185,16 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 		at91rm9200_pmc->pchws[i] = hw;
 	}
 
+	/* Set systemck parent hws. */
+	at91rm9200_systemck[0].parent_hw = usbck_hw;
+	at91rm9200_systemck[1].parent_hw = usbck_hw;
+	at91rm9200_systemck[2].parent_hw = at91rm9200_pmc->pchws[0];
+	at91rm9200_systemck[3].parent_hw = at91rm9200_pmc->pchws[1];
+	at91rm9200_systemck[4].parent_hw = at91rm9200_pmc->pchws[2];
+	at91rm9200_systemck[5].parent_hw = at91rm9200_pmc->pchws[3];
 	for (i = 0; i < ARRAY_SIZE(at91rm9200_systemck); i++) {
-		hw = at91_clk_register_system(regmap, at91rm9200_systemck[i].n,
-					      at91rm9200_systemck[i].p, NULL,
+		hw = at91_clk_register_system(regmap, at91rm9200_systemck[i].n, NULL,
+					      &AT91_CLK_PD_HW(at91rm9200_systemck[i].parent_hw),
 					      at91rm9200_systemck[i].id, 0);
 		if (IS_ERR(hw))
 			goto err_free;
@@ -193,7 +205,8 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
 	for (i = 0; i < ARRAY_SIZE(at91rm9200_periphck); i++) {
 		hw = at91_clk_register_peripheral(regmap,
 						  at91rm9200_periphck[i].n,
-						  "masterck_div", NULL,
+						  NULL,
+						  &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MCK]),
 						  at91rm9200_periphck[i].id);
 		if (IS_ERR(hw))
 			goto err_free;
-- 
2.43.0


  parent reply	other threads:[~2026-01-16 20:07 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-16 20:06 [PATCH v5 00/31] clk: at91: add support for parent_data and ryan.wanner
2026-01-16 20:06 ` [PATCH v5 01/31] clk: at91: pmc: add macros for clk_parent_data ryan.wanner
2026-01-31 14:25   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 02/31] clk: at91: pmc: Move macro to header file ryan.wanner
2026-01-31 14:26   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data ryan.wanner
2026-01-26  8:51   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data ryan.wanner
2026-01-26  8:53   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 05/31] clk: at91: clk-peripheral: switch to clk_parent_data ryan.wanner
2026-01-26  8:52   ` Claudiu Beznea
2026-01-16 20:06 ` [PATCH v5 06/31] clk: at91: clk-main: switch to clk parent data ryan.wanner
2026-01-26  8:52   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 07/31] clk: at91: clk-utmi: use clk_parent_data ryan.wanner
2026-01-26  8:52   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 08/31] clk: at91: clk-master: " ryan.wanner
2026-01-31 14:29   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 09/31] clk: at91: clk-programmable: " ryan.wanner
2026-01-26  8:53   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 10/31] clk: at91: clk-generated: " ryan.wanner
2026-01-30  6:56   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 11/31] clk: at91: clk-usb: add support for clk_parent_data ryan.wanner
2026-01-30  7:06   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 12/31] clk: at91: clk-system: use clk_parent_data ryan.wanner
2026-01-30  7:08   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 13/31] clk: at91: sama7d65: switch system clocks to parent_hw and parent_data ryan.wanner
2026-01-30  7:14   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 14/31] clk: at91: clk-pll: add support for parent_hw ryan.wanner
2026-01-30  7:18   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 15/31] clk: at91: clk-audio-pll: " ryan.wanner
2026-01-30  7:21   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 16/31] clk: at91: clk-plldiv: add support for parent_data ryan.wanner
2026-01-31 10:51   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 17/31] clk: at91: clk-h32mx: " ryan.wanner
2026-01-31 10:53   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 18/31] clk: at91: clk-i2s-mux: " ryan.wanner
2026-01-31 10:54   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 19/31] clk: at91: clk-smd: add support for clk_parent_data ryan.wanner
2026-01-31 10:57   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 20/31] clk: at91: clk-slow: add support for parent_data ryan.wanner
2026-01-31 11:00   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data ryan.wanner
2026-01-31 11:02   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 22/31] clk: at91: sam9x60: " ryan.wanner
2026-01-31 11:05   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 23/31] clk: at91: sama5d2: " ryan.wanner
2026-01-31 11:11   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 24/31] clk: at91: sama5d3: switch to parent_data and parent_hw ryan.wanner
2026-01-31 11:14   ` claudiu beznea
2026-01-16 20:07 ` [PATCH v5 25/31] clk: at91: sama5d4: " ryan.wanner
2026-01-17 18:30   ` kernel test robot
2026-01-16 20:07 ` [PATCH v5 26/31] clk: at91: at91sam9x5: " ryan.wanner
2026-01-31 14:04   ` Claudiu Beznea
2026-01-16 20:07 ` ryan.wanner [this message]
2026-01-31 14:13   ` [PATCH v5 27/31] clk: at91: at91rm9200: switch to parent_hw and parent_data Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 28/31] clk: at91: at91sam9260: " ryan.wanner
2026-01-31 14:16   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 29/31] clk: at91: at91sam9g45: switch to parent_data and parent_hw ryan.wanner
2026-01-31 14:19   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 30/31] clk: at91: at91sam9n12: switch to parent_hw and parent_data ryan.wanner
2026-01-31 14:22   ` Claudiu Beznea
2026-01-16 20:07 ` [PATCH v5 31/31] clk: at91: at91sam9rl: switch to clk_parent_data ryan.wanner
2026-01-31 14:24   ` Claudiu Beznea

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